As such an OR gate should do the job...but if the question is of using gates other than the simple OR, it should be a combo of NOR and NOT gates; where-in, the NOT gate comes after the NOR gate.
Factfully speaking:
The output of a NOR gate when fed to a NOT gate shall give you an OR gate.
cheers :)
Anish Murthy Airpula,
RF Design Engineer (F.A.E)
Ceramic & Microwave Products Group,
Dover Corporation Inc,
4 Nand gates are required to realise an Xor gate.
5 Nor gates are required to realise an Xor gate.
Four NAND gates
4
A&B = ((A&B)')' So two, it would go a - | ==NAND--=NAND-- b - | By using two NAND gates back-to-back, you can create a normal AND gate.
k map is karnaugh map . it is just a method to simplify or minimize the boolean equations so that it becomes easier to realize a circuit using minimum no. of gates.
His last name is Gates, because Gates is his family's name. His last name Gates comes from his ancestors.
Heavens gates are made of pearls
PLA: both AND and OR gates are programmable. PAL: AND gates are programmable whereas OR gates are fixed.
A&B = ((A&B)')' So two, it would go a - | ==NAND--=NAND-- b - | By using two NAND gates back-to-back, you can create a normal AND gate.
4
9,to implement a half adder 5 nand gates and for a full adder,another xor gate is required consisting of 4 nand gates. thus a total of 9 nand gates are required for a full adder.
A: two
4 as a minimum, but you can use more if you really want to.
Check this link http://www.dumpt.com/img/viewer.php?file=bd6b3mqsa66fhr6c76l1.bmp
NMOS PLA is a Programmable Logic Array which is designed by employing NMOS technology i.e. by employing nmos transistors to realize the required gates of PLA. PLA is a combination AND gates and OR gates to produced sum of products terms needed for realizing the required combinational logic. It consists of an array of AND gates followed by OR plane. the connections to the AND and OR inputs can be programmed based on our needs.
k map is karnaugh map . it is just a method to simplify or minimize the boolean equations so that it becomes easier to realize a circuit using minimum no. of gates.
two nand gates
Well you are required to stop 3 feet minimum of the tracks but im sure if the tracks are operational there will be gates that come up and down they are usually about 10 feet away
13 year
by multiplying two NAND gates