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AMD K6-2

 
Wikipedia: AMD K6-2

The K6-2 was an x86 microprocessor introduced by AMD on May 28, 1998, and available in speeds ranging from 266 to 550 MHz. An enhancement of the original K6, the K6-2 introduced AMD's 3D-Now! SIMD instruction set, featured a larger 64 KiB Level 1 cache (32 KiB instruction and 32 KiB data), and an upgraded system-bus interface called Super Socket 7, which was backward compatible with older Socket 7 motherboards. It was manufactured using a 0.25 micrometre process, ran at 2.2 volts, and had 9.3 million transistors.

Contents

History

The AMD K6-2 architecture.

The K6-2 was designed as a competitor to Intel's flagship processor, the significantly more expensive Pentium II. Performance of the two chips was similar: the previous K6 tended to be faster for general-purpose computing, while the Intel part was faster in x87 floating-point applications. The K6-2 was the first CPU to introduce a floating point SIMD instruction set (dubbed 3DNow! by AMD), which potentially boosted the performance of floating-point applications appropriately re-coded for 3DNow. Despite beating Intel's SSE instruction set to market, 3DNow achieved only limited popularity.

Super Socket 7, which increased the processor bus from 66MHz to 100 MHz, allowed the K6-2 to withstand the effects of ever-increasing CPU multipliers fairly gracefully and in later life it remained surprisingly competitive. Nearly all K6-2s were designed to use 100 MHz Super Socket 7 mainboards, allowing the system-bus to keep pace with the K6-2's clock-frequency.

The K6-2 was a very financially successful chip and enabled AMD to earn the revenue it would need to introduce the forthcoming Athlon. The introductory K6-2 300 was by far the best-selling variant. It rapidly established an excellent reputation in the marketplace and offered a favorable price/performance ratio versus Intel's Celeron 300A. The Celeron offered superior floating-point performance, but the K6-2 offered faster system RAM access (courtesy of the Super 7 mainboard), as well as 3DNow graphics extensions.

As the market moved on, AMD released a long series of faster K6-2 parts, the best-selling ones being the 350, 400, 450, and 500. By the time the 450 and the 500 were mainstream parts, the K6-2 family had already moved to the budget PC segment, where it still competed successfully against Intel's Celeron.

K6-2+

The little-known K6-2+ was an enhanced K6-2 with 128 KiB of integrated L2 cache and built on a 0.18 micrometre process (essentially a K6-III+ with half the L2 cache). The K6-2+ was specifically designed as a low-power mobile CPU, and released at a time when mainstream desktop machines were fast moving on to newer platforms like the Athlon. It sold in modest numbers to its target market, and although AMD made no attempt to publicise this, it was also made available as an orthodox desktop CPU. The desktop-packaged K6-2+ was overshadowed in the market by the Athlon (a significantly faster part), the K6-III, and the original K6-2 which, although slower and only marginally cheaper, was better-known and easier to obtain. The K6-2+ topped out at 570MHz.

Models

K6-3D (Chomper, 250 nm)

AMD K6-2 Microprocessor
AMD K6-2, Chomper-XT.

K6-3D (Chomper Extended (CXT), 250 nm)

  • CPUID: Family 5, Model 8, Stepping 12
  • L1-Cache: 32 + 32 KiB (Data + Instructions)
  • MMX, 3DNow!
  • Super Socket 7
  • Front side bus: 66, 95, 97, 100 MHz
  • VCore: 2.0(mobile)/2.2/2.3/2.4V
  • First release: November 16, 1998
  • Clockrate: 266, 300, 333, 350, 366, 380, 400, 427.5, 450, 475, 500, 533 & 550 MHz

K6-2+ (180 nm, mobile)

  • CPU ID: AuthenticAMD Family 5 Model 13
  • L1-Cache: 32 + 32 KiB (Data + Instructions)
  • L2-Cache: 128 KiB, fullspeed
  • MMX, Extended 3DNow!, PowerNow!
  • Super Socket 7
  • Front side bus: 95, 97, 100 MHz
  • VCore: 2.0 V
  • First release: April 18, 2000
  • Manufacturing process: 0.18 µm
  • Clockrate: 450, 475, 500, 533, 550 MHz. (570 MHz, undocumented)

References

  • Khanna, R. et al. (1998). "A 0.25µm x86 microprocessor with a 100MHz Socket 7 interface". ISSCC Digest of Technical Papers, pp. 242–243.

External links


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