Clock edge

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Clock edges shown in rectangular pulse amplitude modulation with polar non-return-to-zero, inverted coding waveform

In electronics, a clock edge is a transition in a clock signal from either low to high (0 to 1) or high to low (1 to 0). It is called an "edge" because the square wave which represents a clock has edges at those points.

A rising edge is the transition of a digital signal from low to high. It is also named positive edge. When a circuit is rising edge triggered, it becomes active when the clock signal goes from low to high, and ignores the high to low transition.

A falling edge is the high to low transition. It's also known as the negative edge. When a circuit is falling edge triggered, it becomes active when the clock signal goes from high to low, and ignores the low to high transition.

A leading edge is a clock cycle event that is triggered on the front edge of a pulse. Assuming the clock begins at t = 0, the first position would be triggered at t = 1.

A trailing edge is the opposite of a leading edge. It is triggered on the back edge of a pulse. Assuming the clock begins at t = 0, the first position would be triggered at t = 0.

It should be noted that the terms front edge or leading edge, back edge or trailing edge describe the related position of edges in a clock cycle. A leading edge can be a falling edge.

See also

• Flip-flops
• Clock signal
• Rise time

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