Hot carriers injection

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Hot carriers injection (HCI) is the phenomenon in solid-state or semiconductor electronic devices where either an electron or a “hole” gains sufficient kinetic energy to overcome a potential barrier between different areas of the device and migrates from one area to another. The kinetic energy of microscopic particles is directly related to the temperature of the matter they constitute: the higher is the temperature, the higher is the (average) kinetic energy of the particles; hence the word “hot”.

HCI and CMOS Semiconductor Technology

Semiconductor Physics of HCI

The term “hot carrier injection” usually refers to the effect in MOSFETs, where a carrier is injected from the conducting channel in the silicon substrate to the gate dielectric, which usually is made of silicon dioxide (SiO₂). To become “hot” and enter the conduction band of SiO₂, an electron must gain a kinetic energy of 3.3 eV. For holes, the valence band offset in this case dictates they must have a kinetic energy of 4.6 eV.

There are several mechanisms which can cause hot carrier injection:

1. Since carriers are accelerated by the strength of the electric field, designs which use too high a voltage coupled with a small dielectric thickness will create a stronger field across the layer and increase the presence of hot carriers.
2. Since a carrier gains kinetic energy in the electric field only while it has “room to run”, which is essentially the mean free path of the carrier, and since mean free path in turn decreases with increasing temperature^{[citation needed]}, low operating temperatures can present a problem. This is the opposite of most wear-out phenomena in solid-state electronics.

Hot carriers can degrade the gate dielectric, causing electron and hole traps to form. This can increase the subthreshold leakage current and cause shifts in the threshold voltage and ultimately, the device will become unstable and/or fail.

Commercial Impact of HCI

Scaling and HCI

Advances in semiconductor manufacturing techniques and ever increasing demand for faster and more complex integrated circuits (ICs) have driven the associated Metal–Oxide–Semiconductor field-effect transistor (MOSFET) to scale to smaller dimensions.

However, it has not been possible to scale the supply voltage used to operate these ICs proportionately due to factors such as compatibility with previous generation circuits, noise margin, power and delay requirements, and non-scaling of threshold voltage, subthreshold slope, and parasitic capacitance.

As a result internal electric fields increase in aggressively scaled MOSFETs, which comes with the additional benefit of increased carrier velocities (up to velocity saturation), and hence increased switching speed, but also presents a major reliability problem for the long term operation of these devices, as high fields induce hot carrier injection which affects device reliability.

Large electric fields in MOSFETs imply the presence of high-energy carriers, referred to as “hot carriers”. These hot carriers that have sufficiently high energies and momenta to allow them to be injected from the semiconductor into the surrounding dielectric films such as the gate and sidewall oxides as well as the buried oxide in the case of silicon on insulator (SOI) MOSFETs.

CMOS Reliability Impact of HCI

The presence of such mobile carriers in the oxides triggers numerous physical damage processes that can drastically change the device characteristics over prolonged periods. The accumulation of damage can eventually cause the circuit to fail as key parameters such as threshold voltage shift due to such damage. The accumulation of damage resulting degradation in device behavior due to hot carrier injection is called “hot carrier degradation”.

The useful life-time of circuits and integrated circuits based on such a MOS device are thus affected by the life-time of the MOS device itself. To assure that integrated circuits manufactured with minimal geometry devices will not have their useful life impaired, the life-time of the component MOS devices must have their HCI degradation well understood. Failure to accurately characterize HCI life-time effects can ultimately affect business costs such as warranty and support costs and impact marketing and sales promises for a foundry or IC manufacturer.

Relationship to Radiation Effects

Hot carrier degradation is fundamentally same as the ionization radiation effect known as the total dose damage to semiconductors, as experienced in space systems due to solar proton, electron, X-ray and gamma ray exposure.

HCI and NOR Flash Memory Cells

HCI is the basis of operation for a number of non-volatile memory technologies such as Electrically Erasable Programmable Read-Only Memory (EEPROM) cells. As soon as the potential detrimental influence of HC injection on the circuit reliability was recognized, several fabrication strategies were devised to reduce it without compromising the circuit performance.

NOR flash memory exploits the principle of hot carriers injection by deliberately injecting carriers across the gate oxide to charge the floating gate. This charge alters the MOS transistor threshold voltage to represent a logic '1' state. An uncharged floating gate represents a '0' state. Erasing the NOR Flash memory cell removes stored charge through the process of Fowler–Nordheim tunneling.

Because of the damage to the oxide caused by normal NOR Flash operation, HCI damage is one of the factors that cause the number of write-erase cycles to be limited. Because the ability to hold charge and the formation of damage traps in the oxide affects the ability to have distinct '1' and '0' charge states, HCI damage results in the closing of the non-volatile memory logic margin window over time. The number of write-erase cycles at which '1' and '0' can no longer be distinguished defines the endurance of a non-volatile memory.

See also

• Time-dependent gate oxide breakdown (also time-dependent dielectric breakdown, TDDB)
• Electromigration (EM)
• Negative bias temperature instability (NBTI)

External links

• An article about hot carriers at www.siliconfareast.com
• IEEE International Reliability Physics Symposium, the primary academic and technical conference for semiconductor reliability involving HCI and other reliability phenomena

References