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Integrated injection logic

 
Sci-Tech Dictionary: integrated injection logic
(′in·tə′grād·əd in′jek·shən ′läj·ik)

(electronics) Integrated-circuit logic that uses a simple and compact bipolar transistor gate structure which makes possible large-scale integration on silicon for logic arrays, memories, watch circuits, and various other analog and digital applications. Abbreviated I2L. Also known as merged-transistor logic.


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(Integrated Injection Logic) A digital circuit composed of bipolar transistors that is known for its very fast switching speeds. I2L means "I Squared Logic" (I2L). See TTL, ECL and bipolar transistor.

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Wikipedia: Integrated injection logic
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Simplified schematic of an I2L inverter.

Integrated injection logic (IIL, I2L, or I2L) is a class of digital circuits built with multiple collector bipolar junction transistors (BJT). When introduced it had speed comparable to TTL yet was almost as low power as CMOS, making it ideal for use in VLSI (and larger) integrated circuits. Although the logic voltage levels are very close (High: 0.7V, Low: 0.2V), I2L has high noise immunity because it operates by current instead of voltage.

Operation

IIL circuit

The heart of an I2L circuit is the common emitter open collector inverter. Typically, an inverter consists of an NPN transistor with the emitter connected to ground and the base biased with a forward current. The input is supplied to the base as either a current sink (low logic level) or as a high-z floating condition (high logic level). The output of an inverter is at the collector. Likewise, it is either a current sink (low logic level) or a high-z floating condition (high logic level).

I2L is relatively simple to construct on an integrated circuit, and was commonly used before the advent of CMOS logic by companies such as Motorola (now Freescale) and Texas Instruments. In the 1975 Sinclair Radionics introduced one of the first consumer-grade digital watches -- the Black Watch which used I2L technology.

To understand how the inverter operates, it is necessary to understand the current flow. If the bias current is shunted to ground (low logic level), the transistor turns off and the collector floats (high logic level). If the bias current is not shunted to ground because the input is high-z (high logic level), the bias current flows through the transistor to the emitter, switching on the transistor, and allowing the collector to sink current (low logic level). Because the output of the inverter can sink current but cannot source current, it is safe to connect the outputs of multiple inverters together to form a wired AND gate. When the outputs of two inverters are wired together, the result is a two-input NOR gate because the configuration (NOT A) AND (NOT B) is equivalent to NOT (A OR B). This logical relationship is known as De Morgan's Theorem.

Generally, I2L gates were constructed with transistors with 1, 2 or 3 separate collectors. This fan-out of up to 3 allowed 3-input NAND or NOR gates to be constructed very simply.

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