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Junction transistor

 
(′jəŋk·shən tran¦zis·tər)

(electronics) A transistor in which emitter and collector barriers are formed between semiconductor regions of opposite conductivity type.


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A transistor in which emitter and collector barriers are formed by pn junctions between semiconductor regions of opposite conductivity type. These junctions are separated by a distance considerably less than a minority-carrier diffusion length, so that minority carriers injected at the emitter junction will not recombine before reaching the collector barrier and therefore be effective in modulating the collector-barrier impedance. Junction transistors are widely used both as discrete devices and in integrated circuits. The discrete devices are found in the high-power and high-frequency applications. Silicon is the most widely used semiconductor material, although germanium is still used for some applications. See also Transistor.

Most modern transistors are fabricated by the silicon self-masked planar double-diffusion technique. The structure of a planar diffused epitaxial transistor is shown in section in the illustration. In this structure both collector and emitter junctions are formed by diffusion of impurities from the top surface. In modern technology the base and emitter diffusions are carried out in two steps: a predeposition step, in which a very thin layer of heavily doped oxide is chemically deposited over the open surface of the silicon in the hole opened in the masking oxide; and a drive-in diffusion step, in which the deposited dopant is diffused into the silicon at a higher temperature than that used for the predeposition. The chemical predeposition step is being replaced by ion implantation directly through the oxide. See also Ion implantation.

Double-diffused planar epitaxial transistor structure and method of fabrication. (<i>a</i>) Buried layer. (<i>b</i>) Epitaxial layer. (<i>c</i>) Collector junction formation. (<i>d</i>) Emitter junction. (<i>e</i>) Contact stripe placement.
Double-diffused planar epitaxial transistor structure and method of fabrication. (a) Buried layer. (b) Epitaxial layer. (c) Collector junction formation. (d) Emitter junction. (e) Contact stripe placement.

Silicon planar technology is used in fabricating integrated circuit chips. The general form of the transistor structure displayed in the illustration is used in integrated circuits. Such a structure is used for diodes as well as transistors since, for example, it is necessary only to connect the base and collector contacts to use the collector junction as a diode. See also Integrated circuits.


 
 

 

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McGraw-Hill Science & Technology Dictionary. McGraw-Hill Dictionary of Scientific and Technical Terms. Copyright © 2003, 1994, 1989, 1984, 1978, 1976, 1974 by McGraw-Hill Companies, Inc. All rights reserved.  Read more
McGraw-Hill Science & Technology Encyclopedia. McGraw-Hill Encyclopedia of Science and Technology. Copyright © 2005 by The McGraw-Hill Companies, Inc. All rights reserved.  Read more

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