Post silicon validation
Post silicon validation is an important part of the ASIC design flow. Post silicon validation is focussed in finding bugs in the silicon after fabricating the chip.
Small designs don't require such a large division of validation. But somehow any design will do an Post silicon validation .For smaller designs probably it will be done by the designer or a tester itself. Large designs , typically called as SoCs will definitely require an independent team of people working on Post silicon validation who will certify the chip on a real time environment. Examples of these larger designs include Processors ( e.g ARM9,ARM7 , XScale ), Wireless chips and networking chips.
In larger designs, ASIC Design cycle typically has the following steps
- Conceptual Design.
- RTL Design.
- RTL verification - This step is called as Pre-Silicon verification. Typically the RTL design is validated in this stage
- Physical design
- Fabricate the chip
- Post silicon validation .
Post silicon validation is the final step that will give complete confidence level to the engineering team .
External links
http://www.us.design-reuse.com/articles/article5252.html
http://download.intel.com/technology/itj/q12001/pdf/art_3.pdf
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