You can address 214 or 16384 different locations with 14 address lines.
16KB
Usually memory banks made up of SRAMs or DRAMs or EPROMs consist of the storage area provided on a microprocessor. For understanding how the address space of a 20 bit address line microprocessor is organised, read about address decoding for even and odd memory addressing through SRAMs and EPROMs.
2^14 memory locations. In general for n-bit address bus, its 2^n
The 8086/8088 microprocessor has a 20 bit address bus, so the number of memory locations it can address is 220 or 1,048,576.
ad is multiplex address data line bus
32 bit address line can access 4GB of memory. As 2^10 -> 1KB; 2^20 -> 2MB; 2^30 -> 1GB and so on.... 32 bit gives (2^30) * (2^2) = 1GB * 4 = 4GB;
wait state is a delay experienced by a microprocessor when accessing external memory or another device that is slow to respond. the vice versa also come into scenario. Now, to be able to access slow memory the microprocessor must be able to delay the transfer until the memory access is complete. One way is to increase the micro processor clock period by reducing the clock frequency. Some micro processors provide a special control input called READY to allow the memory to set its own memory cycle time. If after sending an address out, the microprocessor does not receive a READY input from memory, it enters a wait state for as long as the READY line is in 0 state. When the memory access is completed the READY goes high to indicate that the memory is ready for specified transfer.
An address bus (that may be 8, 16 or 32 bits wide) that sends an address to memoryoA data bus (that may be 8, 16 or 32 bits wide) that can send data to memory or receive data from memoryoAn RD (read) and WR (write) line to tell the memory whether it wants to set or get the addressed locationoA clock line that lets a clock pulse sequence the processor
Memory Read refers to the process when 1) HL pair holds the address which is to be read 2) this address is placed on address lines (ALE : Address Latch Enable, must be high at this moment) 3) then Memory Read Control Signal (MEMR) goes high to signify that at this moment we need to read (get) data from memory. 4) Then ALE goes low and data is placed on lower bit address lines ( Because data lines are multiplexed with lower byte address line) 5) After getting the data in the register, ALE again goes High, MEMR goes low.
It depends on how wide the data buses are on each chip, and how they're connected. If they're one byte wide, you could need over 256 million addresses, one for each byte. if they're wider, and connected to show an even wider combined data bus, it could be much less; around 32 million.
Usually high speed SRAM with CAM (content addressable memory) line address tags.
A Microprocessor provides a memory address (within the address space of that micro, which is related to the number of address pins of the micro. For instance 32 pins can generate 4GB of addresses). In a system with DRAM modules, each DRAm chip contributes with only one bit to compose the word. Each bit has its own address, each DRAM chip has its own address within a module and each module has its own address within the memory system. A DRAM chip is composed by N matrices, so there are "matrix address", line address and column address. There are so many addresses and control signals, and the microprocessor knows nothing about them. Thus, the system must contain a memory controller which translates the address provided by the processor (some times called virtual) into fisical memory address. These translations are made by the hardware (only). Another history is the virtual memory, where there is a mapping between the address provided by the processor and the address where the data is stored (part in ram and part on disk). The address space is broken in pages, and a mapping unit (which can use a cache like memory - TLB) mantain information about which page is on the disk and witch is on the RAM. This system is a combination of hardware and operating system. The precise explanation can be found in any operating system book. Sorry by the English.