16KB
2^14 memory locations. In general for n-bit address bus, its 2^n
You can address 214 or 16384 different locations with 14 address lines.
Usually memory banks made up of SRAMs or DRAMs or EPROMs consist of the storage area provided on a microprocessor. For understanding how the address space of a 20 bit address line microprocessor is organised, read about address decoding for even and odd memory addressing through SRAMs and EPROMs.
A 16 bit address bus can select 65536 locations.
An address bus (that may be 8, 16 or 32 bits wide) that sends an address to memoryoA data bus (that may be 8, 16 or 32 bits wide) that can send data to memory or receive data from memoryoAn RD (read) and WR (write) line to tell the memory whether it wants to set or get the addressed locationoA clock line that lets a clock pulse sequence the processor
The 8086/8088 microprocessor has a 20 bit address bus, so the number of memory locations it can address is 220 or 1,048,576.
ad is multiplex address data line bus
A microprocessor that uses 24 bit addressing, such as the Intel 80286, can address 224 or 16,777,216 memory locations. The IBM MainFrame, 360/44 or any modern version running in AMODE=24 also has the same capacity.
32 bit address line can access 4GB of memory. As 2^10 -> 1KB; 2^20 -> 2MB; 2^30 -> 1GB and so on.... 32 bit gives (2^30) * (2^2) = 1GB * 4 = 4GB;
wait state is a delay experienced by a microprocessor when accessing external memory or another device that is slow to respond. the vice versa also come into scenario. Now, to be able to access slow memory the microprocessor must be able to delay the transfer until the memory access is complete. One way is to increase the micro processor clock period by reducing the clock frequency. Some micro processors provide a special control input called READY to allow the memory to set its own memory cycle time. If after sending an address out, the microprocessor does not receive a READY input from memory, it enters a wait state for as long as the READY line is in 0 state. When the memory access is completed the READY goes high to indicate that the memory is ready for specified transfer.
Memory Read refers to the process when 1) HL pair holds the address which is to be read 2) this address is placed on address lines (ALE : Address Latch Enable, must be high at this moment) 3) then Memory Read Control Signal (MEMR) goes high to signify that at this moment we need to read (get) data from memory. 4) Then ALE goes low and data is placed on lower bit address lines ( Because data lines are multiplexed with lower byte address line) 5) After getting the data in the register, ALE again goes High, MEMR goes low.
Usually high speed SRAM with CAM (content addressable memory) line address tags.