Vss, also known as Gnd, is pin 20 on the 8085.
with neat diagram explain the system bus structure of 8085
ALE=Address Latch Enabled.(pin number 30 in 8085)8085 has a special pin referred as ALE, which indicates whether multiplex bus functions as an address bus or a data bus. Whenever 8085 starts any new operation, ALE signal goes to logic 1 for about 1/2 clock cycle, at about the falling edge of CLK. If ALE=1 then multiplex bus functions as address bus. After that half clock cycle, it goes to logic 0 for nearly 3 or 4 clock cycles. If ALE=0 then multiplex bus acts as a data bus.The ALE pin helps to enable the latching of lower order ADDR bus. The AD0-AD7 pins, as well as other control pins such as S0, S1, IO/M-, and the other address pins A8-A15, are setup to be correct at the falling edge of ALE.
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HL is a register pair that is used to store 16-bit data in 8085 Microprocessor
in 8085 only one accumulator used where in 6800 used two accumulator.
The 8085 is a 40 pin ic because Intel designed it that way.
Pin 28 on the 8086/8088 is M/IO-, in minimum mode. The equivalent pin on the 8085 is IO/M-, and has opposite polarity.
TRAP is a non maskable interrupt pin in 8085.....it has the highest priority out of all the interrupts...it is used in emergency n critical states..ex.during power loss etc.
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TRAP is a single pin interrupt that is non-maskable in the 8085. It is intended for notification of serious system problems and/or as an aid to a hardware assisted debugger.
The INTA- (Interrupt Acknowledge) pin on the 8085 is an acknowledge of the INTR (Interrupt Request). It has the same timing as RD-, and external hardware is expected to provide an opcode, usually a CALL or an RST instruction, in response to INTA-.
The 8085 has a single +5V power supplyThe 8085 has a multiplexed low order address busThe 8085 has extra single pin interrupts, TRAP, RST7.5, RST6.5, and RST5.5The 8085 has serial I/O pins SID and SODThe 8085 has maskable interrupts and the RIM/SIM instructionThe 8085 includes the functionality of the 8224 clock genereator and 8228 system controllerThe 8085 added several 16 bit operations
Pin 36 on the 8085 is RESET-IN/. There is a bar (/) to indicate that this is a negative logic (low=true) pin. Typically, you connect an RC network to pin 36 (1uF to GND, 75KOhm to Vcc, and small signal diode (1N914) across the capacitor with anode on pin 36) which creates a reset pulse at Vcc power on. The diode is used to force discharge on power off, ensuring a reset sequence when power glitches.
The READY pin on the 8085 microprocessor is used to delay the completion of a bus transfer cycle. It is sampled by the 8085 at the falling edge of clock following ALE. If it is high, the cycle completes. If it is low, the cycle is extended by one clock, with all lines held steady - then it is sampled again at each of the next falling edges of clock until it is high. The purpose of READY is to allow (usually) memory devices to operate at a slower speed than the 8085.
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The READY pin on the 8085 microprocessor is used to delay the completion of a bus transfer cycle. It is sampled by the 8085 at the falling edge of clock following ALE. If it is high, the cycle completes. If it is low, the cycle is extended by one clock, with all lines held steady - then it is sampled again at each of the next falling edges of clock until it is high. The purpose of READY is to allow (usually) memory devices to operate at a slower speed than the 8085.