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Trailing edge dimmers (as opposed to leading edge, or triac dimmers) turn off the electrical load at the end, or trailing edge, of the AC input waveform. They control the power to the load by varying the duty cycle (the ratio of on time to on+off time) of the voltage to the load, the same as leading edge or triac dimmers. Cutting off the trailing edge of the waveform allows compatibility with electric loads that are either resistive or capacitive in nature (as opposed to leading edge dimmers which are compatible with resistive and inductive loads). Trailing edge dimmers are more complex than other dimmers, and are usually implemented using back-to-back power FETs (n-channel enhancement-mode MOSFETS with their source terminals connected together, the gates connected together, and the drain terminals acting as the two power terminals). The FETs have an intrinsic body diode which means they always conduct in one direction. Putting two FETs together as described allows current flow to be controlled in either direction (with no gate signal, both FETs are off, and the body diodes allow no current flow either. If one FET is gated on, the current can flow through that FET and the body diode of the other FET).

Trailing edge dimmers are designed to fade the voltage to zero rather than switch it abruptly off, by applying a resistance to create a ramp rather than a "cliff." This greatly reduces interfering electrical and radio emissions. It also increases the amount of heat dissipated, since the resistive period generates heat. Most trailing edge dimmers contain thermal monitors that can adjust the ramp if too much heat is being generated.

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