Verilog is a hardware description language used to model electronic systems.

Verilog is a hardware description language, also known as an HDL. It is most commonly used in the verification and design of digital circuits and the verification of mixed signal and analog circuits. Verilog is the first recognized hardware description language to be invented.

There is not any fullform of verilog.Infact the whole word is called "Verilog HDL" which is "Verilog Hardware Description Language".

concurrent = operating at same time

H. Alan Mantooth has written:

'Modeling with an analog hardware description language' -- subject(s): Computer simulation, Computer hardware description languages, Electronic analog computers