answersLogoWhite

0


Best Answer

Taun+1 is the predicted value for the next cpu burst

tn is the actual measured CPU BURST

<= 0 Alfa => 1

then

Taun+1= Alfa*tn + (1-Alfa)*tn

User Avatar

Wiki User

12y ago
This answer is:
User Avatar

Add your answer:

Earn +20 pts
Q: Determining the length of next CPU Burst?
Write your answer...
Submit
Still have questions?
magnify glass
imp
Related questions

What do you understand by CPU-IO burst?

Waiting of IO burst called cpu burst


How to determining the optimum RAM Speed for a given CPU Is there a formula for Determining optimum RAM speed for a given CPU?

Max it out!!! The CPU can only be as fast as it's cache size and than it's memory.


What is the largest role in determining CPU performance?

speed


What is Control Processing Unit burst and Input and Output burst?

The process of selecting the next job that will run on the CPU belongs to the short-term or CPU scheduler. The CPU scheduler can only pick from the jobs that are already in memory and ready to go. The scheduler works in cooperation with the interrupt system. &bull; The scheduler assigns the CPU to perform computation on behalf of a particular process or thread within a process. &bull; CPU can be "borrowed" from its current process by an interrupt. It is under the control of external devices not scheduler. Interrupts can be disabled for a short time. &bull; When a process or thread requests an I/O transfer, it normally becomes ineligible to use the CPU until the transfer is complete. This means that the scheduler will have to choose a new process or a new thread within the same process to use the CPU. &bull; The process or thread that requested the I/O again becomes eligible to use the CPU when the I/O transfer is complete. CPU I/O Burst Cycle The execution of a process consists of an alternation of CPU bursts and I/O bursts. A process begins and ends with a CPU burst. In between, CPU activity is suspended whenever an I/O operation is needed. &bull; If the CPU bursts are relatively short compared to the I/O bursts, then the process is said to be I/O bound. For example, a typical data processing task involves reading a record, some minimal computation and writing a record. &bull; If CPU bursts are relatively long compared to I/O bursts, a process is said to be CPU bound. A number crunching task involves an I/O burst to read parameters. A very long CPU burst and another I/O burst is required to write results


What is burst time?

In an operating system, burst time refers to the time that it takes to complete execution of a particular task or process. It is used in CPU scheduling.


Role of instruction pointer in 8086?

Its role is to point to the next instruction to be executed in the CPU. It always points to the next instruction to be executed in the CPU


A CPU performance can be measured in?

GHz Wrong. The performance of a CPU is measured in MiPs or MFLOPS The clock speed of a processor is in GHz, but does next to nothing in determining the actual performance of a processor. A 4GHz pentium 4 can't even shake a stick at a modern-day processor clocked at 3GHz.


Where is the horn relay for a 1988 rx7 Mazda?

inside the CPU. the CPU is located under the dash right next to the circuit box. right next to the clutch pedal


Difference between preemptive and non preemptive system.with example?

Preemptive scheduling allows a process to be interrupted in the midst of its execution, taking the CPU away and allocating it to another process.Non-preemptive scheduling ensures that a process relinquishes control of the CPU only when it finishes with its current CPU burst.


What factor help in deciding the length of instruction format?

the number of bits required to represent an instruction of a cpu is known as length of the instruction or known as instruction.


Explain with an example first come first serve scheduling algorithm?

By far the simplest CPU-scheduling algorithm is the first-come, first-served (FCFS) scheduling algorithm. With this scheme, the process that requests the CPU first is allocated the CPU first. The implementation of the FCFS policy is easily managed with a FIFO queue. When a process enters the ready queue, its PCB is linked onto the tail of the queue. When the CPU is free, it is allocated to the process at the head of the queue. The running process is then removed from the queue. The code for FCFS scheduling is simple to write and understand. The average waiting time under the FCFS policy, however, is often quite long. Consider the following set of processes that arrive at time 0, with the length of the CPU-burst time given in milliseconds:


What are not necessarily a property of RISC CPU's?

1. CPU can be driven by a faster clock rate 2. all instructions are constant length 3. The CPU has a large register set compared to CISC CPU's 4. all arithmetic logic instructions are register based 5. The control unit is typically microprogrammed