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n today's changing world that requires more as well as on demand applications that require instantaneous responses, parallel bus technology cannot keep up with its inherent bandwidth limitations. PICMG 1.0 SBC's and backplanes have long been the industry standard due to it's ability to support many different PCI and ISA expansion cards. However as users try to add more PCI cards to their system, the PCI bus becomes overloaded and then performance is degraded, as this bottleneck slowly chokes the systems potential. With increased focus on the user experience, more powerful graphics cards are required to display robust graphic intense applications and PCI graphics cards are not able to keep up. The PICMG 1.3 specification solves all the bandwidth problems of the past, while still support some legacy buses. With the introduction of PICMG 1.3 the first major change is the SBC and backplane interface, the parallel bus interfaces are replace with high-speed serial inks. However PICMG 1.3 is still backwards compatible with PCI and PCI-X expansion cards as well as PCI Express cards.. In addition, the new standard offers advanced features such as IPMI, Serial ATA, USB, and Ethernet connections directly on the backplane. The PICMG 1.3 specification replaces the PICMG 1.0 ISA / PCI bus combination with PCI Express and / or PCI / PCI-X interfaces to the backplane. PICMG 1.3 Buses PICMG 1.3 single board computers can support multiple PCI Express lanes on a backplane, including x1, x4, x8, or x16. The A and B connectors on the SBC are responsible for PCIe power and data to and form the SBC and backplane. PICMG 1.3 Edge Connector Electrical Functions PICMG 1.3 Edge Connector Electrical Functions On a PICMG 1.3 system PCI and PCI-X cards can take advantage of the high-speed serial links, streamlined interconnects, and robust protocol that PCI Express offers in the PICMG 1.3 specification via PCI Express-to-PCI / PCI-X bridge chips on the backplane. The specification also accommodates an optional 32-bit PCI / PCI-X connection for supporting passive (no bridge chip) backplanes. The PCI / PCI-X clock rate between the SHB’s optional connector D and the backplane can be 33 MHz, 66 MHz, 100 MHz, or 133 MHz, depending on the backplane’s and the SHB’s design. Connector C contains extra edge connector contacts for additional power. The specification also features optional SHB to backplane interfaces for: * SATA * USB * IPMB * SMBUS * Geographic addressing * Power management Real World Benefits of PICMG 1.3 The end result of PICMG 1.3 is Increased bandwidth and more advanced integrated features. The increased bandwidth will allow your system to grow and perform at peak performance without choking. You can fully populate your backplane with high speed, PCIe, PCI, and PCI-X cards without worrying about bottlenecks in the busses. Integrated features onto the backplane allow for easier maintenance when switch out SBC's. Essentially all the SBC becomes is a processor board, since all IO and connections are able to go through the backplane. When installing a new SBC, the hardware abstraction layer in the OS doesn't need to worry about new hard drive controllers, since they are all on the backplane, thus avoiding the blue screen of death. Lastly the need for more advanced graphics capability is solved, the PICMG 1.3 standard supports x16 PCI Express buses, which is the same bus that the video card industry for their video cards. Now virtually any high end PCI Express video card can be installed on a backplane, with up to 18 other slots of various PCI and PCIe cards next to it. Orbit Micro's New PICMG 1.3 Products We have deployed numerous new SBC and backplane products featuring the PICMG 1.3 standard. In addition we have developed a whole new line of systems featuring this technology as well.
