ALE is a signal that means that the data bus contains the lower order address bus values. External hardware should strobe the data bus during ALE time, and lock it on the falling edge of ALE.
There is no exit instruction in the 8085. Do you mean return, as in from a function or interrupt? If so, the instruction is RET.
It provides timing signals.
It is an 8 bit register which is accessable to programmer and is main fuction is to perfom all arithmetic and logical function.
The TMP register in the 8085 is used to hold temporary results of operations. You cannot directly manipulate it, so you should just pretend it is not there.
8085 is a microprocessor designed by Intel
I know of no PMW pin or PMW instruction in the 8085. Please restate the question. If you are asking about PWM, or pulse width modulation, please note that that is not an 8085 specific thing. It would be a function of system design, and you could achieve PWM with programming, but the answer would depend on the particulars of that system design.
The 8085 was replaced with the 8086/8088. As such, there is no 16 bit version of the 8085.
The 8085 has a single +5V power supplyThe 8085 has a multiplexed low order address busThe 8085 has extra single pin interrupts, TRAP, RST7.5, RST6.5, and RST5.5The 8085 has serial I/O pins SID and SODThe 8085 has maskable interrupts and the RIM/SIM instructionThe 8085 includes the functionality of the 8224 clock genereator and 8228 system controllerThe 8085 added several 16 bit operations
The 8085 was introduced by Intel in 1977.
The 8085 is not pipelined.
The '8085' in the 8085 microprocessor is the designation given to the microprocessor by Intel. The '5' means it is a single power supply (5 volt) version of the 8080, with enhancements.
The READY pin on the 8085 microprocessor is used to delay the completion of a bus transfer cycle. It is sampled by the 8085 at the falling edge of clock following ALE. If it is high, the cycle completes. If it is low, the cycle is extended by one clock, with all lines held steady - then it is sampled again at each of the next falling edges of clock until it is high. The purpose of READY is to allow (usually) memory devices to operate at a slower speed than the 8085.