(Except for my discussion of ALE, below, I was not aware that the clock signal in the 8085 microprocessor was not perfectly square, but in my designs using the 8085 it did not matter, as I always made sure the hardware design always met the correct setup and hold times. This answer is intuitive, rather than being based on internal design knowledge.) In order to maximize clock speed, and resulting processor performance, Intel designed internal delays into various aspects of the 8085 design. Since these delays were not symmetrical for each edge of the clock, the resulting clock is not square, even though it is stated that clock is one half of the oscillator frequency. (As far as ALE is concerned, I was aware that ALE became true about one sixth of a clock after the falling edge of clock, and persisted for about one half clock. This does not line up with clock or with the oscillator running at twice clock, so it is obvious that there are internal delays built in. All I knew was that the rising edge of clock following ALE occured during ALE, and that the status lines and high address bus changed state about one sixth clock after the beginning of ALE, so I took this into account when I designed my bus control logic.)
We use clock signal in timing diagram because the microprocessor operates with reference to clock signals provided to it. At pins X1 and X2 we provide clock signals and this frequency is divided by two. This frequency is called as the operating frequency.
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A Brother With Perfect Timing was created in 1987.
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There is an example of a LHLD 5000H diagram on this website: atelier-drachenhaus.de/timing-diagram-8085. This will provide an idea of how to draw the diagram.