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8051 and 8052 aren't interchangable, but they are similar.

The 8052 is identical to the 8051 with the following enhancements:

1. The 8052 has 256 bytes of internal RAM, the 8051 has 128.

2. The 8052 has three (3) 16-bit timers, the 8051 has two (2). The third timer has some new operation modes not available with the 8051.

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Intel introduced the MCS-51 family of microcontrollers in 1980 as an enhanced MCS-48. The 8051 is the main processor in this family, featuring 4K EPROM, 128 bytes of RAM, 2x 16-bit timer/counters, serial UART, 2x external active low interrupts that can either be level or edge triggered (falling edge only), RAM stack that can address the full RAM space, vectored interrupts, and 16-bit address/8-bit data front side bus. The 8051 also includes a dedicated address latch pin (ALE), dedicated external program ROM read strobe pin (PSEN), and an active low external access pin (EA). When EA is externally tied high, the 8051 executes code from its internal ROM while addressing instructions past the internal program ROM space addresses external ROM if present. All code execution takes place from external program ROM if EA is tied low. The 8051's 16-bit program counter and front side bus can address up to 65536 external memory addresses for compatibility with a total of 64K external program ROM space. The 8051 also has a read and write strobe available (P3.6/WR and P3.7/RD) for up to 64K of external RAM as well. The 8052 is the 8051's big brother. It is identical to the 8051, with the addition of 8KB on chip program ROM, a 3rd 16-bit timer/counter with 16-bit autoreload (this timer can also be used as the baud rate generator for the UART in 16-bit autoreload, making for a baud timer with greater resolution for more available baud rates with just about any crystal), and a capture module that works with timer 2. The 8052 also has an additional 128B of RAM, making for a total of 256 bytes of on chip RAM space. The upper 128 bytes of RAM can only be indirectly addressed. The AT89S52 is Atmel's derivative of the 8052. It is compatible with Atmel's In-System Programming (ISP) via an on chip SPI interface, which allows it to be programmed via Atmel's AT89ISP programmer while the MCU is in the target circuit.


What is difference between 8051 and AT89S52?

Intel introduced the MCS-51 family of microcontrollers in 1980 as an enhanced MCS-48. The 8051 is the main processor in this family, featuring 4K EPROM, 128 bytes of RAM, 2x 16-bit timer/counters, serial UART, 2x external active low interrupts that can either be level or edge triggered (falling edge only), RAM stack that can address the full RAM space, vectored interrupts, and 16-bit address/8-bit data front side bus. The 8051 also includes a dedicated address latch pin (ALE), dedicated external program ROM read strobe pin (PSEN), and an active low external access pin (EA). When EA is externally tied high, the 8051 executes code from its internal ROM while addressing instructions past the internal program ROM space addresses external ROM if present. All code execution takes place from external program ROM if EA is tied low. The 8051's 16-bit program counter and front side bus can address up to 65536 external memory addresses for compatibility with a total of 64K external program ROM space. The 8051 also has a read and write strobe available (P3.6/WR and P3.7/RD) for up to 64K of external RAM as well. The 8052 is the 8051's big brother. It is identical to the 8051, with the addition of 8KB on chip program ROM, a 3rd 16-bit timer/counter with 16-bit autoreload (this timer can also be used as the baud rate generator for the UART in 16-bit autoreload, making for a baud timer with greater resolution for more available baud rates with just about any crystal), and a capture module that works with timer 2. The 8052 also has an additional 128B of RAM, making for a total of 256 bytes of on chip RAM space. The upper 128 bytes of RAM can only be indirectly addressed. The AT89S52 is Atmel's derivative of the 8052. It is compatible with Atmel's In-System Programming (ISP) via an on chip SPI interface, which allows it to be programmed via Atmel's AT89ISP programmer while the MCU is in the target circuit.


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