A nor gate provides an output of 0 when any input is 1.
Nor gate provides the opposite of or gate. An or gate provides a 1 or true output when any of the inputs is 1 or true. Therefore the opposite output would be provided by a nor gate.
I have no interest in doing your homework. Draw up a truth table and figure it out.
nor
The OR gate
Short the inputs together. Logic: A High input, with the inputs shorted together, will be H+H at the input side of the NAND gate, therefore resulting in a low output. A Low input, with both inputs shorted together, is L+L for inputs, resulting in a High output. Also, a NOR gate can be used in exactly the same way.
the pullup or pull down resistance in the diode logic gate makes it a high output resistance device.If u try to drive another diode logic gate with it the output voltage of the first gate will be affected by the resistance in the second gate.A diode logic gate should always drive a high input resistance input.
A: NAND implies not and to be true both input must be hi or true <> There are two flavors of NAND gate. The positive input/negative output NAND will have a low output if and only if both inputs are high. The negative input/positive output NAND will have a high output if and only if both inputs are low.
a 7408 ic chip is a quadruple, 2 input AND Gate chip. These chips have 14 pins. Pin 7 is gnd and pin 14 is vcc. In principle, an AND Gate is just that. A gate that is Active high. To get an active high output, you must have both inputs active high. 5 volts on each input will give you a 5 volt output. These IC chip use TTL (transistor-transistor logic). They are obsolete and are no longer used in todays electrical circuits. Most electronic systems use a large CPLD, Complex Programmable Logic Device, that can be used to implement digital logic designs that contain 20,000 or fewer gates. Texas Instruments poineered the TTL 7408 IC chip. CPLD boards are commonly made by a company named Altera
Propagation Delay In digital logic, every gate has got some finite amount of delay because of which the change in the output is not instantaneous to the change in the input. In simple terms, the times it takes for an input to appear at the output is called the propagation delay. In Figure 6, tPHL, describes the time it takes for an input to cause the output to change from logic-level-high to logic-level-low. Similarly, tPLH, refers to the delay associated when an input change causes the output to change from logic-level-low to logic-level-high. The overall delay is average of these two delays.
When all inputs are HIGH.
Short the inputs together. Logic: A High input, with the inputs shorted together, will be H+H at the input side of the NAND gate, therefore resulting in a low output. A Low input, with both inputs shorted together, is L+L for inputs, resulting in a High output. Also, a NOR gate can be used in exactly the same way.
1. NAND gate is used to invert the input A (by connecting A to both inputs). 2. NAND gate used to invert B the same way 3. Now put A' and B' into into a third NAND gate. The output will be (A'B')' which is equivalent to A+B.
The output of the AND gate is high when both inputs are high because that is the definition of an AND gate. (Ouput is true ONLY WHEN Input A AND Input B are true.)
NOR - has two or more inputsinverter - only has one input, so that input is all inputs
The gate is called EXNOR gate. its output is high when only one input is high. the Boolean expression for this gate for two inputs A and B is AB+A'B'
A NOR gate
A NAND gate is digital logic device which will have 2 or more inputs which can be logic 1 or logic 0 (on or off, high or low) with all the inputs at logic 0 the output will be at logic 1, the only time the output will switch to a logic 0 is when ALL the inputs are at logic 1. here is a simple "truth table" To show the basic operation Input1 Input2 Output Off--------Off------- On Off--------On------- On On--------Off------- On On------- On------- Off NAND stand for not AND therefore a false will be present on the output only when both input are true ANSWER: NAND stands for NOT AND it simply negate the function. The only time that the output can be false if all inputs are true. In logic functions there is no ON-OFF it is either true or false "1" or "0"
It's a "quad, 2 input nor gate". To understand the significance of a "nor" gate, you need to understand a little about digital logic. An "or" gate takes 2 or more digital inputs and if either is "on", the output will be on. (asserted high). A "nor" gate inverts the output of the "or" gate, meaning that when either of the outputs are "on", the output will be "off" (asserted low). The two input part of the description just indicates that it only accepts two inputs. So, simply stated: If either (or both) input(s) of a quad, 2 input nor gate is (are) asserted high, the output will be low. If both inputs are off (low), the output will be high.
It's a "quad, 2 input nor gate". To understand the significance of a "nor" gate, you need to understand a little about digital logic. An "or" gate takes 2 or more digital inputs and if either is "on", the output will be on. (asserted high). A "nor" gate inverts the output of the "or" gate, meaning that when either of the outputs are "on", the output will be "off" (asserted low). The two input part of the description just indicates that it only accepts two inputs. So, simply stated: If either (or both) input(s) of a quad, 2 input nor gate is (are) asserted high, the output will be low. If both inputs are off (low), the output will be high.
An AND gate
NAND