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In microprocessors, from 8086 there is 20bit address bus. This address bus is so organised that reading a word(16bit string from 8086 to 80286 and 32bit string from 80386 to PIV) starting at even address is different from reading a word starting from odd address.

suppose a word starts at 20000h address so it will placed in 20000h and 20001h respectively,then, this word is read by the microprocessor in 1 clock cycle i.e. the byte at 20000h and byte at 20001h are simultaneously read. Hence the word is read in 1 clock cycle.

but had a word started at 20001h-- 1 byte in 20001h and the other byte in 20002h

then the microprocessor is unable to read the word in 1 clock cycle. It takes 1 clock cycle to read the word from 20001h and another clock cycle to read the word from 20002h. Hence a word stored a odd location slows down the process of reading it.

this entire process is referred as Even banking and Odd banking.

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