A segment address is the contents of a segment register, CS, DS, ES, or SS. It is used after effective address generation to provide an offset in physical memory, by multiplying the segment register by 16 and then adding it to the effective address, giving a 20 bit address.
This gives you addressability to 65536 segments of 65536 bytes, each separated by 16 bytes.
The register used is usually implicit based on use; CS for code, DS for data, ES for certain string operations, and SS for stack. A segment override prefix can be used to select a different segment register.
You cannot. The conversion goes this way: segment+offset -> [segment-table] -> linear_address -> [page-table] -> physical_address PS: In most cases there is only one (4GB long) segment (or one code-segment and one data-segment), so offset is quite the same as linear address
Pointers to far objects are stored using four bytes (32 bits). The bytes are stored little endian or low to high order. The first word contains the 14-bit memory offset (bits 14 and 15 are always 0). The second word contains the page number (or segment number for function pointers). The memory address is calculated as follows: Variable Address = (Page * 0x4000L) + OffsetFunction Address = (Segment * 0x10000L) + Offset
A code segment, also known as the text segment holds all the executable instructions of the process. The text segment usually starts from the lowest address space of the process memory (leaving behind a small unmapped memory ..not mapped to a physical memory) --Vivek Purushotham (vivek.purushotham@gmail.com)
Programs that are loaded into memory typically have several segments associated with them: the Code Segment (CS), the Stack Segment (SS), the Data Segment (DS), sometimes an Extended Segment (ES), and almost always a Block Started by Symbol (BSS) segment. This question requires that we focus only on the Code Segment (CS). The CS is a segment of memory that contains some of the instructions that are required for the program to execute. If this segment is not large enough to contain the whole program then the program can be loaded into different segments. Such a segment may be 64Kb in size (although the size may differ). Instructions located in these segments are referred to by their offset from the start of the segment, and not by their absolute location in memory. Thus, in order to locate a certain instruction, we need the segment's starting address, and the offset of the instruction in that segment. Whenever a branch (jump, goto) takes place which refers to an instruction that is located in another segment, it is known as a far jump, conversely whenever a jump refers to an instruction that is located in the same segment, it is known as a near jump. The difference referring to the modication of the CS register which contains the address of the current Code Segment for the current running program.
The 8085 had a 16-bit address bus thus it could address a maximum of 64KB of memory (2^16). The 8086 had a 20-bit address bus and could therefore address a maximum of 1MB of memory (2^20). To maintain compatibility, segmented memory was introduced, such that the segment and offset were stored in separate 16-bit registers. In order to perform 20-bit pointer arithmetic upon the 8086, the segment and offset had to be normalised by the compiler to produce a valid 20-bit address. This was achieved by left-shifting the segment by 4 bits and then adding on the offset. The 8086 also introduced the concept of near, far and huge pointers. A near pointer only stores the offset while far and huge pointers store both the segment and the offset. The only practical difference between far and huge pointers is in how pointer arithmetic works. With far pointers, only the offset is affected whereas with huge pointers, both the segment and the offset are affected.
For any segment base address, segment first physical address will have 0 in the least significant position in hexadecimal format. Let say, our Segment base =0x1234, and we calculate segment first physical address as 0x12340
segment is for converting physical address to logical address , here on taking 8086 microprocessor as example, we have 20 address lines but it is capable of taking only 16 address lines.... so to convert that 20 into 16 segment is used....
For the formation of physical address we need Segment address and offset address Consider an example Segment Address : 1005H Offset Address : 5555H Segment address : 1005H 0001 0000 0000 0101 Shifted by 4 bit positions : 0001 0000 0000 0101 0000 Offset Address : + 0101 0101 0101 0101 Physical Address : 0001 0101 0101 1010 0101 1 5 5 A 5 H Physical Address of given Segment Address : 155A5H
MAC address
stack segment
The 16 bit segment register is left shifted by 4 and added to the effective address to form a 20 bit physical address.
In the 8086/8088, the logical address corresponds to a segment register, such as CS (Code Segment), DS (Data Segment), SS (Stack Segment) and ES (Extra Segment). The segment register is selected by context, or it is explicitly selected using a segment override prefix. The segment register is left shifted 4 bits into a 20-bit temporary register. This is the same as multiplying it by 16. Then the logical address is added to that result. The final result is the physical address.
Segmentation is a Memory Management technique in which memory is divided into variable sized chunks which can be allocated to processes. Each chunk is called a segment. A table stores the information about all such segments and is called Global Descriptor Table (GDT). A GDT entry is called Global Descriptor. It comprise of :To translate a logical address into a linear address, the processor does the following: # Uses the offset in the segment selector to locate the segment descriptor for the segment in the GDT or LDT and reads it into the processor. (This step is needed only when a new segment selector is loaded into a segment register.) # Examines the segment descriptor to check the access rights and range of the segment to insure that the segment is accessible and that the offset is within the limits of the segment. # Adds the base address of the segment from the segment descriptor to the offset to form a linear address. If paging is not used, the processor maps the linear address directly to a physical address (that is, the linear address goes out on the processor's address bus). If the linear address space is paged, a second level of address translation is used to translate the linear address into a physical address.A segment selector is a 16-bit identifier for a segment. It does not point directly to the segment, but instead points to the segment descriptor that defines the segment. A segment selector contains the following items: ; Index ; : (Bits 3 through 15). Selects one of 8192 descriptors in the GDT or LDT. The processor multiplies the index value by 8 (the number of bytes in a segment descriptor) and adds the result to the base address of the GDT or LDT (from the GDTR or LDTR register, respectively). ; ;TI (table indicator) flag ; : (Bit 2). Specifies the descriptor table to use: clearing this flag selects the GDT; setting this flag selects the current LDT. ;
You cannot. The conversion goes this way: segment+offset -> [segment-table] -> linear_address -> [page-table] -> physical_address PS: In most cases there is only one (4GB long) segment (or one code-segment and one data-segment), so offset is quite the same as linear address
8086 has memory divided into segments.Each segment has its particular register like ES, DS, SS, CD (extra segment, data segment, stack segment and code segment).These registers hold the base address BA.Now, there two base registers(BX and BP) and two index registers(SI and DI) in 8086. These registers hols the effective address EA.Now Physical address PA is sum of EA and BA.That is,PA = BA+EA
The segment register in the 8086/8088 provide a base address for any memory access. There are four segment registers, CS - Code Segment, DS - Data Segment, SS - Stack Segment, and ES - Extra Segment. Each in used in the context of a particular instruction and contains the base address of the memory segment divided by 16. This allows the processor to access up to 1 MB of memory, though only in segments of 64 KB at a time.
The physical address in the 8086/8088 is calculated by adding the effective address with the contents of one of the segment registers left shifted by 4 bit positions. This results in a 20 bit address bus. As an example, if the CS register contains 1234H, and the IP register contains 5678H, then the next instruction is fetched from physical address 179B8H, which is 1234H times 16 (12340H) plus 5678H. The segment register used is selected by context, or by using a segment override prefix, however, the code segment register (CS) can not be overidden during instruction fetch, nor can the stack segment register (SS) be overidden during stack pushes and pops.