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For a J-K flip-flop to set the output Q upon the active clock transition (typically the rising edge), the conditions are that the J input must be high (J = 1) and the K input must be low (K = 0). This combination ensures that when the clock triggers, the flip-flop will set Q to 1. If both J and K are low, or if J is low and K is high, the output Q will either remain in its current state or reset, respectively.

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