The 8086 interrupt priorities are concerned ,software interrupt have the highest priority,followed by NMI ,followed by INTR.The lowest priority signals are unmaskable interrupts.
8086 have 5 interrupt lines.
No. RST7.5 is a maskable interrupt on the 8085, not the 8086/8088.
yes Kane masked and unmasked are same
When the 8086 microprocessor receives an interrupt signal, it completes the execution of the current instruction and saves the address of the next instruction onto the stack. It then determines the appropriate interrupt vector from the Interrupt Vector Table (IVT) based on the interrupt type. The processor then transfers control to the interrupt service routine (ISR) associated with that interrupt. After the ISR has executed, the 8086 retrieves the saved address from the stack and resumes execution from where it was interrupted.
Interrupt vector table
The BIOS function in the 8086 microprocessor is called an interrupt function. It is an interrupt function because it is not called by a function call instruction.
There are 256 different interrupt vectors in the 8086/8088. Each vector is a far CS:IP address, which is four bytes. That makes the interrupt vector table 1,024 bytes.
The 8086 interrupt table is from 0000h to 03FFh for interrupt 0 through interrupt 255. It is common practice to design systems that use only the lower-numbered interrupts and then use the upper part of the interrupt table for code or data. For more information see: http://datasheets.chipdb.org/Intel/x86/808x/datashts/8086/231455-005.pdf
The TRAP interrupt can not be masked by software, unless there is hardware in place to allow that, perhaps by anding an output bit with the TRAP request line.
masked is black and unmasked dosent have hair
Interrupt Acknowledgegenerated by the microprocessor in response to INTR. Causes the interrupt vector to be put onto the data bus
In the 8086/8088, the interrupt vector table is the first 1024 bytes of memory. In the 8085, the interrupt vector table is the first 64 bytes of memory if using the RST form of interrupt, otherwise the interrupt vector is provided by the interrupting device, usually in the form of a CALL instruction. The interrupt handler is wherever the interrupt vector points to.