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The 8085 instruction MOV M,A requires two machine cycles and 7 T states. Cycle one is 3 T states for opcode fetch, plus 1 T state for opcode decode. Cycle two is 3 T state for operand store. These numbers do not include WAIT states. WAIT states are interposed between T2 and T3 of any memory access cycle, and the total number of WAIT states depends on the READY line.

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Q: 8085 microprocessor state the number of machine cycles and t-states required to complete the execution of the 8085 instruction mov m a?
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