For calculating the T states of the any instruction ,you should know how many machine cycles does the instruction contains and the number of T states in each of the machine cycles
for example,
In a 8085 microprocessor set ,the instr. JMP contains three machine cycles
Therefore , the instr. JMP has a total of 10T states
3 T states for instruction fetch, 1 T state for decode, 1 T state for register E decrement, 1 T state for possible register D decrement.
16
INX H instruction requires 1 machine cycle having 6 T-states because 8-bit instruction operate on 16 bit data (HL) completed in 6 T-states.
three
RET instruction needs 3 machine cycles. One to fetch and decode the instruction(4 T states), and two more machine cycles(i.e. 2*3=6 T states) to read two bytes from the stack(stack is exterior to microprocessor, stack is in R/W memory, so to exchange data with stack needs machine cycles). Thus, RET instruction needs total 3 machine cycles and 10 T-states.
18 T States. 6T States for Opcode fetch. 3 *2 T States for memory write(PC pushed to stack) 3*2 T States for memory read (New value of PC fetched from memory). Good Luck!!!
for 8085 microprocessor CALL [32-bit address] which is (unconditional ) consumes maximum(18) T states.
The 8085 instruction MOV M,A requires two machine cycles and 7 T states. Cycle one is 3 T states for opcode fetch, plus 1 T state for opcode decode. Cycle two is 3 T state for operand store. These numbers do not include WAIT states. WAIT states are interposed between T2 and T3 of any memory access cycle, and the total number of WAIT states depends on the READY line.
The STA 4200H instruction in the 8085 requires 4 machine cycles and 13 T states to complete its fetch, processing, and execution. Cycle One: Opcode fetch, 3 T states plus one opcode process state. Cycle Two: Opcode address byte 00H fetch, 3 T states Cycle Three: Opcode address byte 42H fetch, 3 T states Cycle Four: Accumulator store, 3 T states. Each cycle will have additional T-Ready states as needed by the READY pin. 13 T states is the minimum. The LDA instruction will also require 13 T states, with the last cycle being a read cycle instead of a write cycle.
Three for opcode fetch, one for decode, two to process the manipulation of the stack pointer.
Each instruction requires specific time for the execution of instruction and this time is called instruction cycle. Each instruction cycle consists 1 to 5 machine cycle -- opcode fetch, memory read, memory write, IO read, IO write and each machine cycle consist 3 to 6 T - states. Time required to execute 1 T-state = 1/ operating frequency of 8085 Microprocessor for example operating frequency = 2MHz then time required to execute 1 T-state = 0.5 uSec example: Calculate time required to execute instruction MOV C, A sol: This instruction has one machine cycle i.e. opcode fetch (In any instruction 1st cycle is always opcode fetch and opcode fetch consists 4 to 6 T state depend on the operation of particular instruction) so to execute MOV C, A required 4T states so time required to execute this instruction is 4*0.5usec = 2usec any other queries pls contect: nileshbahadure2000@yahoo.co.in example:Calculate the time required to execute LXI H,2000H sol:Here we have to draw opcode fetch and two memory reads as two bytes 00H and 20H have to be read from memory. i.e, opcode fetch+Memory reads *2(bytes address) =4+3+3 so to execute LXI H,2000H,the required T-states is 10T and time is 10*0.5usec=5usec
The STA instruction in the 8085 has 13 T states, 4 for opcode fetch, 3 for low half immediate address fetch, 3 for high half immediate address fetch, and 3 for data write.