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I'm assuming that you mean "Add the contents of memory to an accumulator and place the sum back in the accumulator".

First, the address of the memory location needs to be placed on the address bus and the control lines to memory need to be driven in such a way as to tell the memory that a write operation has been requested (usually enabling OE and synchronizing with a clock).

Next (one or more clock cycles later depending on the type of memory being used), the data is returned from the memory. It must then be routed to the ALU.

The value in the accumulator must also be moved to the ALU and can be performed in either the first or second CPU cycle, depending on the internal architecture of the CPU. It is probably safest to do this in the first cycle.

Next the ALU must perform the addition instruction (third CPU cycle).

Finally, in the fourth cycle, the result can be moved from the ALU back to the accumulator.

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Q: How do you draw timing diagram of ADD M instruction?
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