The maximum size of a cache memory is theoretically equal to the amount of primary memory(RAM).Like Cache only memory architecture where the whole memory space is filled up with the cache only.
Register memory are smaller in size than cache memory and registers are faster than cache..Cache memory store the frequently used data from main memory..
If we took size of cache as large as size of main memory then the main purpose of cache(take less time) would come to end, as larger the cache slower would be it's processing speed.
There are different type of cache memory: processor cache memory, cache memory ram,1 cache memory l2, cache memory, CPU cache memory, disk cache memory, hard disk cache, cache memory motherboard.
because cache memory is costlier than main memory and physical size of cache memory also matters.ignoring the cost , if we use large cache memory, it will take larger physical space.so mother board won't be able to accomodate it
Temporal Locality: Concept that a resource will be referenced at one point in time will be referenced again. Cache miss traffic decreases fast when cache size increases and temporal locality determines sensitivity to cache size.Spatial Locality: Concept that likelihood of referencing a resource is higher if a resource near it was referenced. Cache miss traffic does not increase much when line size increases. Spatial locality determines sensivity to line size.
There are different type of cache memory: processor cache memory, cache memory ram,1 cache memory l2, cache memory, CPU cache memory, disk cache memory, hard disk cache, cache memory motherboard.
Usually the size of the L2 cache will be larger than the L1 cache so that if data hit in L 1 cache occurs, it can look for it in L 2 cache.. If data is not in both of the caches, then it goes to the main memory...
consider a RAM of 64 words with a size of 16 bits.Assume that this memory have a cache memory of 8 Blocks with block size of 32 bits.Draw a diagram to show the address mapping of RAM and Cache, if 4-way set associative memory scheme is used.
No cache memory is not visible.....
Temporal Locality: Concept that a resource will be referenced at one point in time will be referenced again. Cache miss traffic decreases fast when cache size increases and temporal locality determines sensitivity to cache size. Spatial Locality: Concept that likelihood of referencing a resource is higher if a resource near it was referenced. Cache miss traffic does not increase much when line size increases. Spatial locality determines sensivity to line size. ~BR Mukkaysh Srivastav Temporal Locality: Concept that a resource will be referenced at one point in time will be referenced again. Cache miss traffic decreases fast when cache size increases and temporal locality determines sensitivity to cache size. Spatial Locality: Concept that likelihood of referencing a resource is higher if a resource near it was referenced. Cache miss traffic does not increase much when line size increases. Spatial locality determines sensivity to line size. ~BR Mukkaysh Srivastav
sram is used for cache for cache memory.