0
1.DMA may lead to cache coherency problems.
2.May lead to bus error interrupt, which arent easy to process.
Wiki User
∙ 11y ago
Add your answer:
Earn +20 pts
What are the type of cache memory?
There are different type of cache memory: processor cache memory, cache memory ram,1 cache memory l2, cache memory, CPU cache memory, disk cache memory, hard disk cache, cache memory motherboard.
What are the two types of cache memory?
There are different type of cache memory: processor cache memory, cache memory ram,1 cache memory l2, cache memory, CPU cache memory, disk cache memory, hard disk cache, cache memory motherboard.
Is cache memory visible?
No cache memory is not visible.....
Cache memory and register memory?
Register memory are smaller in size than cache memory and registers are faster than cache..Cache memory store the frequently used data from main memory..
What type of RAM is used for cache memory?
sram is used for cache for cache memory.
What technology has replaced DMA?
If by DMA you mean Direct Memory Access, nothing has replaced it.
Which bus transfers the memory address to the IO device or to the memory device?
DMA Direct Memory Access DMA transfers data directly from the drive to memory w/out involving the CPU.
What is the recommended size of cache memory in a processor?
The maximum size of a cache memory is theoretically equal to the amount of primary memory(RAM).Like Cache only memory architecture where the whole memory space is filled up with the cache only.
Why is cache memory needed?
Cache Memory is needed because Hardware implements cache as a block of memory for temporary storage likely to be used again.
What is the difference between cache-memory and primary-memory?
Cache memory is smaller and quicker, primary memory larger and slower.
What is the difference between cache memory disk cache?
memory cache is on memory RAM, disk Cache is on the hard drive. They make things to get faster. For instance Google Earth use this disk cache to show you offline images.
Can you name the two cache memory?
l1 cache l2 cache
