0
Want this question answered?
Be notified when an answer is posted
Add your answer:
Earn +20 pts
When was Jbe' Kruger born?
Jbe' Kruger was born on 1986-06-26.
Can human be infected to asthma by kissing?
Asthma can not be transmitted from one person to another because it is not considered an infectiious disease. However, it can jbe spread due to the fact that People can inhale their asthma symptoms.
How run the microprocessor program?
.Model small .data num db 47h,58h,14h,b4h.89h .code .start: mov ax,@data mov ds,ax back: add bl,[si] inc si dec dh inz back mov ch,02h mov dh,4bh mov cl,04l up: rol dh,cl mov bl,dh and bl,0fh cmp bl,09h jbe next add bl,07h next: add bl,30h mov ah,02h mov dl,bl int 21h dec ch jnz up end start end
What is Coding of 7 segment display using assembly language?
mov ax, @data ; Initialize data section mov ds, ax mov bx, offset lookup ; Load offset of lookup in bx mov al, key ; key no. in al xlat ; translate byte in al mov bh, al ; al = lookup(key) mov ch, 02h ; Count of digits to be displayed mov cl, 04h ; Count to roll by 4 bits l2: rol bh, cl ; roll bl so that msb comes to lsb mov dl, bh ; load dl with data to be displayed and dl, 0fH ; get only lsb cmp dl, 09 ; check if digit is 0-9 or letter A-F jbe l4 add dl, 07 ; if letter add 37H else only add 30H l4: add dl, 30H mov ah, 02 ; Function 2 under INT 21H (Display character) int 21H dec ch ; Decrement Count jnz l2 mov ah, 4cH ; Terminate Program int 21H end
What is an awesome free rider 2 track?
-c 1e -5 1l h 1c,-1b 74 -i 6t,-1b ek -r f4 -f ek,3c 1vm 3o 1vs,-49 l5 -3n la,-2i 102 -21 10c -1g vv,-2d 1a4 -2e 1at,-34 1av -2i 1ar,-8r 1f9 -8g 1g7,-6l 1kl -52 1jv,-6n 1kl -7h 1o3,-bj 1r7 -an 1r9,-9f 2em -8k 2eo -8j 2dq,-bt 2ha -c1 2i4 -bj 2i9 -au 2i3,-eq 2r3 -bu 2ot,-j4 2uq -j2 2vf -ib 2vh,-di 3a3 -e6 3b1,-gv 3gk -im 3p3 -jf 3pu -kf 3qe,-km 3qh -mb 3qj,-MD 3qj -nq 3pq,-nq 3po -oh 3np,2h i9a 2r iag 3s ibo 4p icr 5o idm 7g iel 95 ife b0 ig3 cv igk fh ih0 i5 ihd kl ihr n5 ii8 pn iij sc iiu uu ija 11b ijo 13l ik7 15s ikn 180 il8 1a2 ilp 1c2 imc 1e0 imv 1fs inj 1hn io7 1jh ios 1l9 iph 1n0 iq6 1on iqs 1qc iri 1s1 is8 1tm isv 1va itm 20t IUD 22g iv4 242 ivr 25k j0i 271 j26 289 j46 29i j63 2aq j7t 2c3 j9m 2de jbe 2ep jd4 2g4 jep 2hg jgd 2in jhchicken pie6,2ev jo6 2en jq4 2ej js2 2ej ju0 2em jvv 2es k1u 2f4 k3t 2fd k5s 2fo k7r 2g4 k9q 2gi kbq 2h0 kdp 2hf kfo 2hv kho 2ig kjn 2ii kll 2hn kmi 2gh knq 2fk kpe 2er kr5 2e6 ksu 2di kup 2d1 l0k 2ch l2h 2c3 l4d 2bm l6b 2bb l88 2b0 la6 2am lc5 2ae le3 2a5 lg2 29t li0 29m ljv 29f llu 298 lnt 292 lpt 28s lrs 28m ltr 28g lvr 28k m1q 291 m3o 29r m5l 2au m7c 2c7 m90 2di maj 2f3 mc2 2gg md2 2hs me2 2j6 mf2 2kd mg2 2m2 mhc,2m2 mhc 2no mik 2ph mjo 2rc mko 2sv mlc 2ui mlv 304 mmh 31q mmt 33n mn5 35o mna 37o mnf 39r mnh 3bt mnj 3dv mnl 3fv mno 3ht mnt 3jq mo2 3ll mo9 3ne mog 3p7 moo 3qu mp0 3sl mp9 3ub mpj 400 mpt 41l mq7 43p mpp 458 mol 46k mne 480 mm8 49j ml3 4b5 mk1 4cn mj0 4e9 mhu 4fr mgn 4hc mfh 4iu mec 4kf md9 4m1 mc8 4ni mb7 4p3 ma8 4qk m99 4s4 m8c 4tl m7f 4v6 m6j 50m m5n 525 m4t 534 m6g 52u m9c 52p mc9 52o mf1 52p mhk,52p mhk 52t mk3 534 mme 53c mom 53c mqp 52n msi 525 mu9 51l n00 518 n1n 50u n3f 50l n55 4ut n5r 4ss n61 4pk n59 4mc n4f 4j9 n3j 4gc n2k 4dl n1k 4b2 n0j 48i mvd 465 mu6 43s mt1,50r n59 520 n48 537 n2m 54a n1a 55f n03 56p mv2 586 mu5 59l mtc 5a9 msr 59c mts 58e mv5 57k n0f 56t n1m 566 n2v 55s n3o 57s n35 59i n2n 5b7 n2b 5cs n22 5ec n1b 5g8 n0e 5i4 mvl 5g9 n0h 5e1 n1f 5c1 n2a 5a8 n31 58k n3n 56p n4h 556 n57 588 n5u 5b5 n6g 5dt n73 5ge n7f 5ij n79 5kd n6u 5lo n6h 5jt n6d 5hu n70 5g2 n7i 5e8 n82 5cg n8h 5au n8u 5d7 n8p 5fk n86 5hq n7j 5ju n6u 5m1 n6b 5o0 n5r 5pu n5d 5rh n53 5pp n6a,5pp n6a 5o8 n73 5ml n7r 5l4 n8g 5jb n98 5hq n9s 5jr n95 5m2 n88 5o0 n7e 5q1 n6n 5s3 n62 5u8 n5f 60b n4t 62c n4e 64a n41 620 n4v 5uo n65 5sd n71 5q5 n7t 5ns n8r 5lm n9p 5ii nb5 5fn nce 5iq nbs 5lv naq 5p7 n9p 5s8 n8q 5v3 n7u 61q n75 64c n6d 66q n5o 694 n54 6bc n4i 6dg n40 6fj n3g 6hj n31 6jh n2j 6le n26 6jf n39 6h3 n3v 6ek n4k 6cb n58 698 n62 66e n6u 63p n7t 61a n8r 5v0 n9o 5sp nal 5qj nbh 5oh ncd 5mi nd9,5mi nd9 5km ne4 5j3 net 5lk neg 5oc ndr 5rn nd1 5u7 ncf 60j nbu 62s nbf 663 nap 694 na4 6bv n9i 6el n91 6h7 n8g 6jl n81 6lv n7j 6o7 n76 6qb n6q 6sd n6e 6ud n63 70c n5o 728 n5e 73v n57 728 n5n 70g n66 6ug n6m 6s0 n7a 6p5 n7u 6mn n8a 6kb n8l 6i1 n91 6em n9h 6bi na2 68k nai 65r nb4 637 nbm 60n nc7 5v1 nco 615 nd1 654 ncm 67t ncf 6ai nc8 6d2 nc2 6ff nbt 6ir nbm 6m0 nbf 6p0 nb9 6rp nb4 6ue nb0 70v nas 73c nap,73c nap 75l nam 77i na7 797 n9p 7b0 n99 7cn n8q 7eo n8a 7gf n81 7i4 n7o,7i4 n7o 7jp n7f 7ld n77 7n1 n6v 7p6 n72 7r5 n7r 7t3 n8o 7v0 n9o 80e nan 81t nbo 83e ncq 84u ndu 86f nf2 87v ng7 89g nhl 8b2 nj2 8cj nkd 8e5 nln 8fm nn0 8h8 no7 8ip npe 8ka nqj 8lq nro 8nb nss 8os ntv 8qc nv2 8rs o04 8td o16 8ut o27 90d o39 92b o44 949 o4v 967 o5r 985 o6o 9a4 o7l 9c2 o8j 9e0 o9h 9ff oa7 9gu oau 9id obl 9js occ 9lb od3 9mp odq 9o8 oeh 9pn of8 9rm og2 9tl ogp 9vj ohg a1i oi7 a3i oif a5j oii,a5j oii a7k oin a9k oit abl oj5 adl ojd afl ojb,afk ojn ah4 ojs aj5 ok3 alf okc aoa okn ara ol2 aud ole b14 olp b3i om3 b5p omb b7q omi b9m omp bbc omv bdc on6 bf5 onb bgl onf bhv oni bja onl bkb onn bm2 oo0 bo2 ooh bpk oou br5 opd bsn oqg btn os6 btd ou4 bt6 ovv bt2 p1q bt0 p3j bt1 p5a bt4 p71 bt8 p8n bte PAC bvg pbp c0h pcv c15 pef c1p pfu c1v phm c22 pjh c22 pld c21 pn9 c20 pp8 c1s pqr c1g psu c0l pue bvh pvr bup q1c bue q3f bu6 q5j bvi q74 c12 q8i,c12 q8i c2g qa1 c06 qbl btg qco bs4 qdv brv qfm bqv qh8 br9 qj6 br7 ql0 bs1 qmc bs9 qno bu3 qnm bve qo3 c1u qou c1i qqs c0r qs1 bvj qtt bv6 qv7 bvc r0e bsb r11 bq1 r1f bs5 r2s buf r39 c1n r3t c42 r4j c10 r56 bud r5k brv r62 bpk r6h bn5 r72 bpe r7b bs3 r7f bu0 r7o bqm r8j boc r96 bl3 ra3 bjr ran bm8 rbb bo2 rbq bm2 rdr bju reo bic rfr ble rge boc rh2 br5 rhm boe riu blv rjk bjj rka bhe rl0 bkn rm3 bo2 rmg,bo2 rmg bpk rn0 bmn rnh bjc ro3 bgp roj bjm rou bm8 rp6 bnu rpf bm2 rqj bk3 rr4 bic rri bh1 rru bka rrr bni rrp bpm rs0 bnj rsl blc rt1 bj6 rtd bh4 rts bfh ruk bf0 s0l bfa s2l bgj s45 bi9 s5h bkg s6r bmp s83 bp4 s98 brf sad btq sbg c0f sce c32 sda c5j se7 c82 sf2 caf sfs ccr sgm cf4 shg ch9 sib cjc sj7 cld sk3 cnc sl0 cp9 sls cr5 smq csv snn cuo soa d0f sou d26 spi d3r sq7 d5h sqt d75 srj d8p ss9 dad st0,dad st0 dc0 stn ddi suf df4 sv6 dgk svs di5 t0i djk t14 dlh t1k dni t18 dpk t0r drl t0g dtn t08 dvn t03 e1o svv e3p svt e5p svt e7p svt e9p svv ebp t01 edp t04 efp t08,efc t0g egj t0f eii t0j eki t0n emb t0l eo8 t0f er9 svo eu9 sum f0v ssp f3b sqe f5a snk f71 skn f8l shv fa6 sfc fbl sct fd5 sah fet s8b fg5 s6b ff9 s4h fdv s3i fcg s2c fbh s0g far rue fae rsr fa3 rr9 f8p rpq f74 Ron f5b roq f3r rpa f31 rqj f3o rsf f5b rtu f7q rvg f9v s0q fbl s1g fcr s1d fdt s15 fel s1f fdm s2l fbu s3v faa s5a f8s s6o f7e s8b f6c s9l f55 sb8 f42 sck f35 se2 f28 sfh f13 sh1 evt sij eup sk4,eup sk4 eto slk esq sn1 esa sor esa sqn ese ssq esg sus esf t0v ese t30 esb t52 es7 t73 es2 t8f es2 t7j es3 t6q es4 t64 es8 t4p es9 t3e es9 t29 es8 t17 erj t2g er6 t46 epr t5o enu t6r em5 t7u eke t91 ej3 t8n elg t7v eos t8p es5 t9b ev7 t8m f1r t7r f42 t77 f2v t9o f10 tb5 ev5 tci esi tej eqc tdr es2 teq etn tfm evi tgh f1a THC f2v ti9 f4h tj5 f61 tk2 f7e tkv f8q tls fai tn3 fc7 tob fdq tpi ffb tqq fgr ts3,fgr ts3 fi9 ttb fjn tuj fl3 TVs fll u0f fl9 tva fj2 tti fgt tsb fe4 tqv fbf tpl f8v toc f6i tn6 f49 tm1 f23 tku f00 tjs et0 tib eq7 tgt enh tfh el1 te6 eik tcu ega tbn ee4 tai ec0 t9d e9u t8a e7v t78 e61 t66 e45 t56 e2b t46 e0h t36 dup t27 dt2 t18 drc t0a dqj t2p drk t5c dsj t7j dte t9g dst tbf drp tcn dqi tdt dpc tf1 do6 tg2 dmt tgq dmg tfs dmj tf0 dmm te3 dnj td4 dp2 td0 dq5 te4 dqa tfs dq5 Tia dpu tkd,dpu tkd dpl tmf dpb tog dp0 tqe dok tsb,dok tsb do7 tu6 dnq u00 dnc u1p dmt u3g dne u5k dom u5u dph u54 dq0 u3c dqf u17 dqp tvl dra tts drs ts0 dsh tq6 dta tod du1 tmr dup tli dv3 tnn dup tqa duf tsn du5 tuu dts u0t dtk u2k dtb u4k dt3 u6b dt8 u7l du4 u8a dv5 u7t e06 u7b e0v u6t e0i u5k,e0i u5k e05 u44 e01 u2p dvv u1e dvv u06 dvv tup e01 ttg e01 trs dvv tqf e01 toq e03 tn9 e05 tm0,e05 tm0 dvo tko duv tjs du3 tkh dta tlg dsl tmc ds5 tng drl toj dr5 tpo dqm tr3 dqc tsi dq4 tts dps tv0 dpl u04 dpd u18 dp6 u25 dop u2r dod u1r dop u0q dov tvg dou tu7 dos tsu dos tro dp0 tqk dp8 tpi dpl toc dq7 tn0 dqn tlm dr3 tkf dr7 tj4 dr7 thr dr1 tgi dqn tf9 dqc te5 dpb tco do8 tbl dnc tb8 dmr tc9 dmg tdg dm6 tek dm3 tfo dm0 tgp dlu thn dlt tih,eam tn0 eal tob eae tpn ea6 tr6 ea1 tsf e9r tto e9l tv5 e9g u0k e99 u24 e91 u3k e8r u4v e8m u62 e8k u7g e8o u8v e94 uae e9t ubc ear ubl ebo ub5 eca ua5 ecf u8s ecf u7g ecc u5v ec9 u4h ec9 u33 eca u1l ecb u06 eci tua ecm tsj ecf tqr ec7 tpa ebu tnu ebl tmp eb3 tm2 eap tmq eaj tnm,ecr tg7 ebu tgb eb3 th1 eaf thu ead tiu ebf tjg eck tjf edg tj1 edt ti5 ee0 tha edj tgi ect tg6##T -23 vp,T -3 18,T -hi 3hc,T -hn 3i0
Explain the instruction set of 8086 with examples?
Complete 8086 instruction setQuick reference:AAAAADAAMAASADCADDANDCALLCBWCLCCLDCLICMCCMPCMPSBCMPSWCWDDAADASDECDIVHLTIDIVIMULININCINTINTOIRETJAJAEJBJBEJCJCXZJEJGJGEJLJLEJMPJNAJNAEJNBJNBEJNCJNEJNGJNGEJNLJNLEJNOJNPJNSJNZJOJPJPEJPOJSJZLAHFLDSLEALESLODSBLODSWLOOPLOOPELOOPNELOOPNZLOOPZMOVMOVSBMOVSWMULNEGNOPNOTOROUTPOPPOPAPOPFPUSHPUSHAPUSHFRCLRCRREPREPEREPNEREPNZREPZRETRETFROLRORSAHFSALSARSBBSCASBSCASWSHLSHRSTCSTDSTISTOSBSTOSWSUBTESTXCHGXLATBXOROperand types:REG: AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH, DL, DI, SI, BP, SP.SREG: DS, ES, SS, and only as second operand: CS.memory: [BX], [BX+SI+7], variable, etc...(see Memory Access).immediate: 5, -24, 3Fh, 10001101b, etc...Notes:When two operands are required for an instruction they are separated by comma. For example:REG, memoryWhen there are two operands, both operands must have the same size (except shift and rotate instructions). For example:AL, DLDX, AXm1 DB ?AL, m1m2 DW ?AX, m2Some instructions allow several operand combinations. For example:memory, immediateREG, immediatememory, REGREG, SREGSome examples contain macros, so it is advisable to use Shift + F8 hot key to Step Over (to make macro code execute at maximum speed set step delay to zero), otherwise emulator will step through each instruction of a macro. Here is an example that uses PRINTN macro: include 'emu8086.inc' ORG 100h MOV AL, 1 MOV BL, 2 PRINTN 'Hello World!' ; macro. MOV CL, 3 PRINTN 'Welcome!' ; macro. RETThese marks are used to show the state of the flags:1 - instruction sets this flag to 1.0 - instruction sets this flag to 0.r - flag value depends on result of the instruction.? - flag value is undefined (maybe 1 or 0).Some instructions generate exactly the same machine code, so disassembler may have a problem decoding to your original code. This is especially important for Conditional Jump instructions (see "Program Flow Control" in Tutorials for more information).Instructions in alphabetical order:Instruction Operands Description AAA No operands ASCII Adjust after Addition.Corrects result in AH and AL after addition when working with BCD values.It works according to the following Algorithm:if low nibble of AL > 9 or AF = 1 then:AL = AL + 6AH = AH + 1AF = 1CF = 1else AF = 0CF = 0in both cases:clear the high nibble of AL.Example: MOV AX, 15 ; AH = 00, AL = 0Fh AAA ; AH = 01, AL = 05 RET C Z S O P A r ? ? ? ? r AAD No operands ASCII Adjust before Division.Prepares two BCD values for division.Algorithm:AL = (AH * 10) + ALAH = 0Example: MOV AX, 0105h ; AH = 01, AL = 05 AAD ; AH = 00, AL = 0Fh (15) RET C Z S O P A ? r r ? r ? AAM No operands ASCII Adjust after Multiplication.Corrects the result of multiplication of two BCD values.Algorithm:AH = AL / 10AL = remainderExample: MOV AL, 15 ; AL = 0Fh AAM ; AH = 01, AL = 05 RET C Z S O P A ? r r ? r ? AAS No operands ASCII Adjust after Subtraction.Corrects result in AH and AL after subtraction when working with BCD values.Algorithm:if low nibble of AL > 9 or AF = 1 then:AL = AL - 6AH = AH - 1AF = 1CF = 1else AF = 0CF = 0in both cases:clear the high nibble of AL.Example: MOV AX, 02FFh ; AH = 02, AL = 0FFh AAS ; AH = 01, AL = 09 RET C Z S O P A r ? ? ? ? r ADC REG, memorymemory, REGREG, REGmemory, immediateREG, immediate Add with Carry.Algorithm:operand1 = operand1 + operand2 + CFExample: STC ; set CF = 1 MOV AL, 5 ; AL = 5 ADC AL, 1 ; AL = 7 RET C Z S O P A r r r r r r ADD REG, memorymemory, REGREG, REGmemory, immediateREG, immediate Add.Algorithm:operand1 = operand1 + operand2Example: MOV AL, 5 ; AL = 5 ADD AL, -3 ; AL = 2 RET C Z S O P A r r r r r r AND REG, memorymemory, REGREG, REGmemory, immediateREG, immediate Logical AND between all bits of two operands. Result is stored in operand1.These rules apply:1 AND 1 = 11 AND 0 = 00 AND 1 = 00 AND 0 = 0Example: MOV AL, 'a' ; AL = 01100001b AND AL, 11011111b ; AL = 01000001b ('A') RET C Z S O P 0 r r 0 r CALL procedure namelabel4-byte addressTransfers control to procedure, return address is (IP) is pushed to stack. 4-byte address may be entered in this form: 1234h:5678h, first value is a segment second value is an offset (this is a far call, so CS is also pushed to stack).Example: ORG 100h ; directive to make simple .com file. CALL p1 ADD AX, 1 RET ; return to OS. p1 PROC ; procedure declaration. MOV AX, 1234h RET ; return to caller. p1 ENDP C Z S O P A unchanged CBW No operands Convert byte into word.Algorithm:if high bit of AL = 1 then: AH = 255 (0FFh)else AH = 0Example: MOV AX, 0 ; AH = 0, AL = 0 MOV AL, -5 ; AX = 000FBh (251) CBW ; AX = 0FFFBh (-5) RET C Z S O P A unchanged CLC No operands Clear Carry flag.Algorithm:CF = 0C 0 CLD No operands Clear Direction flag. SI and DI will be incremented by chain instructions: CMPSB, CMPSW, LODSB, LODSW, MOVSB, MOVSW, STOSB, STOSW.Algorithm:DF = 0D 0 CLI No operands Clear Interrupt enable flag. This disables hardware interrupts.Algorithm:IF = 0I 0 CMC No operands Complement Carry flag. Inverts value of CF.Algorithm:if CF = 1 then CF = 0if CF = 0 then CF = 1C r CMP REG, memorymemory, REGREG, REGmemory, immediateREG, immediate Compare.Algorithm:operand1 - operand2result is not stored anywhere, flags are set (OF, SF, ZF, AF, PF, CF) according to result.Example: MOV AL, 5 MOV BL, 5 CMP AL, BL ; AL = 5, ZF = 1 (so equal!) RET C Z S O P A r r r r r r CMPSB No operands Compare bytes: ES:[DI] from DS:[SI].Algorithm:DS:[SI] - ES:[DI]set flags according to result:OF, SF, ZF, AF, PF, CFif DF = 0 then SI = SI + 1DI = DI + 1else SI = SI - 1DI = DI - 1Example:see cmpsb.asm in c:\emu8086\examples\.C Z S O P A r r r r r r CMPSW No operands Compare words: ES:[DI] from DS:[SI].Algorithm:DS:[SI] - ES:[DI]set flags according to result:OF, SF, ZF, AF, PF, CFif DF = 0 then SI = SI + 2DI = DI + 2else SI = SI - 2DI = DI - 2Example:see cmpsw.asm in c:\emu8086\examples\.C Z S O P A r r r r r r CWD No operands Convert Word to Double word.Algorithm:if high bit of AX = 1 then: DX = 65535 (0FFFFh)else DX = 0Example: MOV DX, 0 ; DX = 0 MOV AX, 0 ; AX = 0 MOV AX, -5 ; DX AX = 00000h:0FFFBh CWD ; DX AX = 0FFFFh:0FFFBh RET C Z S O P A unchanged DAA No operands Decimal adjust After Addition.Corrects the result of addition of two packed BCD values.Algorithm:if low nibble of AL > 9 or AF = 1 then:AL = AL + 6AF = 1if AL > 9Fh or CF = 1 then: AL = AL + 60hCF = 1Example: MOV AL, 0Fh ; AL = 0Fh (15) DAA ; AL = 15h RET C Z S O P A r r r r r r DAS No operands Decimal adjust After Subtraction.Corrects the result of subtraction of two packed BCD values.Algorithm:if low nibble of AL > 9 or AF = 1 then:AL = AL - 6AF = 1if AL > 9Fh or CF = 1 then: AL = AL - 60hCF = 1Example: MOV AL, 0FFh ; AL = 0FFh (-1) DAS ; AL = 99h, CF = 1 RET C Z S O P A r r r r r r DEC REGmemoryDecrement.Algorithm:operand = operand - 1Example: MOV AL, 255 ; AL = 0FFh (255 or -1) DEC AL ; AL = 0FEh (254 or -2) RET Z S O P A r r r r r CF - unchanged! DIV REGmemoryUnsigned divide.Algorithm:when operand is a byte:AL = AX / operandAH = remainder (modulus) when operand is a word:AX = (DX AX) / operandDX = remainder (modulus) Example: MOV AX, 203 ; AX = 00CBh MOV BL, 4 DIV BL ; AL = 50 (32h), AH = 3 RET C Z S O P A ? ? ? ? ? ? HLT No operands Halt the System.Example: MOV AX, 5 HLT C Z S O P A unchanged IDIV REGmemorySigned divide.Algorithm:when operand is a byte:AL = AX / operandAH = remainder (modulus) when operand is a word:AX = (DX AX) / operandDX = remainder (modulus) Example: MOV AX, -203 ; AX = 0FF35h MOV BL, 4 IDIV BL ; AL = -50 (0CEh), AH = -3 (0FDh) RET C Z S O P A ? ? ? ? ? ? IMUL REGmemorySigned multiply.Algorithm:when operand is a byte:AX = AL * operand. when operand is a word:(DX AX) = AX * operand. Example: MOV AL, -2 MOV BL, -4 IMUL BL ; AX = 8 RET C Z S O P A r ? ? r ? ? CF=OF=0 when result fits into operand of IMUL. IN AL, im.byteAL, DXAX, im.byteAX, DX Input from port into AL or AX.Second operand is a port number. If required to access port number over 255 - DX register should be used.Example: IN AX, 4 ; get status of traffic lights. IN AL, 7 ; get status of stepper-motor. C Z S O P A unchanged INC REGmemoryIncrement.Algorithm:operand = operand + 1Example: MOV AL, 4 INC AL ; AL = 5 RET Z S O P A r r r r r CF - unchanged! INT immediate byte Interrupt numbered by immediate byte (0..255).Algorithm:Push to stack: flags registerCSIPIF = 0Transfer control to interrupt procedureExample: MOV AH, 0Eh ; teletype. MOV AL, 'A' INT 10h ; BIOS interrupt. RET C Z S O P A I unchanged 0 INTO No operands Interrupt 4 if Overflow flag is 1.Algorithm:if OF = 1 then INT 4Example: ; -5 - 127 = -132 (not in -128..127) ; the result of SUB is wrong (124), ; so OF = 1 is set: MOV AL, -5 SUB AL, 127 ; AL = 7Ch (124) INTO ; process error. RET IRET No operands Interrupt Return.Algorithm:Pop from stack: IPCSflags registerC Z S O P A popped JA label Short Jump if first operand is Above second operand (as set by CMP instruction). Unsigned.Algorithm:if (CF = 0) and (ZF = 0) then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 250 CMP AL, 5 JA label1 PRINT 'AL is not above 5' JMP exit label1: PRINT 'AL is above 5' exit: RET C Z S O P A unchanged JAE label Short Jump if first operand is Above or Equal to second operand (as set by CMP instruction). Unsigned.Algorithm:if CF = 0 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 5 CMP AL, 5 JAE label1 PRINT 'AL is not above or equal to 5' JMP exit label1: PRINT 'AL is above or equal to 5' exit: RET C Z S O P A unchanged JB label Short Jump if first operand is Below second operand (as set by CMP instruction). Unsigned.Algorithm:if CF = 1 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 1 CMP AL, 5 JB label1 PRINT 'AL is not below 5' JMP exit label1: PRINT 'AL is below 5' exit: RET C Z S O P A unchanged JBE label Short Jump if first operand is Below or Equal to second operand (as set by CMP instruction). Unsigned.Algorithm:if CF = 1 or ZF = 1 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 5 CMP AL, 5 JBE label1 PRINT 'AL is not below or equal to 5' JMP exit label1: PRINT 'AL is below or equal to 5' exit: RET C Z S O P A unchanged JC label Short Jump if Carry flag is set to 1.Algorithm:if CF = 1 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 255 ADD AL, 1 JC label1 PRINT 'no carry.' JMP exit label1: PRINT 'has carry.' exit: RET C Z S O P A unchanged JCXZ label Short Jump if CX register is 0.Algorithm:if CX = 0 then jumpExample: include 'emu8086.inc' ORG 100h MOV CX, 0 JCXZ label1 PRINT 'CX is not zero.' JMP exit label1: PRINT 'CX is zero.' exit: RET C Z S O P A unchanged JE label Short Jump if first operand is Equal to second operand (as set by CMP instruction). Signed/Unsigned.Algorithm:if ZF = 1 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 5 CMP AL, 5 JE label1 PRINT 'AL is not equal to 5.' JMP exit label1: PRINT 'AL is equal to 5.' exit: RET C Z S O P A unchanged JG label Short Jump if first operand is Greater then second operand (as set by CMP instruction). Signed.Algorithm:if (ZF = 0) and (SF = OF) then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 5 CMP AL, -5 JG label1 PRINT 'AL is not greater -5.' JMP exit label1: PRINT 'AL is greater -5.' exit: RET C Z S O P A unchanged JGE label Short Jump if first operand is Greater or Equal to second operand (as set by CMP instruction). Signed.Algorithm:if SF = OF then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 2 CMP AL, -5 JGE label1 PRINT 'AL < -5' JMP exit label1: PRINT 'AL >= -5' exit: RET C Z S O P A unchanged JL label Short Jump if first operand is Less then second operand (as set by CMP instruction). Signed.Algorithm:if SF OF then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, -2 CMP AL, 5 JL label1 PRINT 'AL >= 5.' JMP exit label1: PRINT 'AL < 5.' exit: RET C Z S O P A unchanged JLE label Short Jump if first operand is Less or Equal to second operand (as set by CMP instruction). Signed.Algorithm:if SF OF or ZF = 1 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, -2 CMP AL, 5 JLE label1 PRINT 'AL > 5.' JMP exit label1: PRINT 'AL = 5.' JMP exit label1: PRINT 'AL < 5.' exit: RET C Z S O P A unchanged JNB label Short Jump if first operand is Not Below second operand (as set by CMP instruction). Unsigned.Algorithm:if CF = 0 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 7 CMP AL, 5 JNB label1 PRINT 'AL < 5.' JMP exit label1: PRINT 'AL >= 5.' exit: RET C Z S O P A unchanged JNBE label Short Jump if first operand is Not Below and Not Equal to second operand (as set by CMP instruction). Unsigned.Algorithm:if (CF = 0) and (ZF = 0) then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 7 CMP AL, 5 JNBE label1 PRINT 'AL 5.' exit: RET C Z S O P A unchanged JNC label Short Jump if Carry flag is set to 0.Algorithm:if CF = 0 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 2 ADD AL, 3 JNC label1 PRINT 'has carry.' JMP exit label1: PRINT 'no carry.' exit: RET C Z S O P A unchanged JNE label Short Jump if first operand is Not Equal to second operand (as set by CMP instruction). Signed/Unsigned.Algorithm:if ZF = 0 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 2 CMP AL, 3 JNE label1 PRINT 'AL = 3.' JMP exit label1: PRINT 'Al 3.' exit: RET C Z S O P A unchanged JNG label Short Jump if first operand is Not Greater then second operand (as set by CMP instruction). Signed.Algorithm:if (ZF = 1) and (SF OF) then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 2 CMP AL, 3 JNG label1 PRINT 'AL > 3.' JMP exit label1: PRINT 'Al = 3.' JMP exit label1: PRINT 'Al < 3.' exit: RET C Z S O P A unchanged JNL label Short Jump if first operand is Not Less then second operand (as set by CMP instruction). Signed.Algorithm:if SF = OF then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 2 CMP AL, -3 JNL label1 PRINT 'AL < -3.' JMP exit label1: PRINT 'Al >= -3.' exit: RET C Z S O P A unchanged JNLE label Short Jump if first operand is Not Less and Not Equal to second operand (as set by CMP instruction). Signed.Algorithm:if (SF = OF) and (ZF = 0) then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 2 CMP AL, -3 JNLE label1 PRINT 'AL -3.' exit: RET C Z S O P A unchanged JNO label Short Jump if Not Overflow.Algorithm:if OF = 0 then jumpExample: ; -5 - 2 = -7 (inside -128..127) ; the result of SUB is correct, ; so OF = 0: include 'emu8086.inc' ORG 100h MOV AL, -5 SUB AL, 2 ; AL = 0F9h (-7) JNO label1 PRINT 'overflow!' JMP exit label1: PRINT 'no overflow.' exit: RET C Z S O P A unchanged JNP label Short Jump if No Parity (odd). Only 8 low bits of result are checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.Algorithm:if PF = 0 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 00000111b ; AL = 7 OR AL, 0 ; just set flags. JNP label1 PRINT 'parity even.' JMP exit label1: PRINT 'parity odd.' exit: RET C Z S O P A unchanged JNS label Short Jump if Not Signed (if positive). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.Algorithm:if SF = 0 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 00000111b ; AL = 7 OR AL, 0 ; just set flags. JNS label1 PRINT 'signed.' JMP exit label1: PRINT 'not signed.' exit: RET C Z S O P A unchanged JNZ label Short Jump if Not Zero (not equal). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.Algorithm:if ZF = 0 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 00000111b ; AL = 7 OR AL, 0 ; just set flags. JNZ label1 PRINT 'zero.' JMP exit label1: PRINT 'not zero.' exit: RET C Z S O P A unchanged JO label Short Jump if Overflow.Algorithm:if OF = 1 then jumpExample: ; -5 - 127 = -132 (not in -128..127) ; the result of SUB is wrong (124), ; so OF = 1 is set: include 'emu8086.inc' org 100h MOV AL, -5 SUB AL, 127 ; AL = 7Ch (124) JO label1 PRINT 'no overflow.' JMP exit label1: PRINT 'overflow!' exit: RET C Z S O P A unchanged JP label Short Jump if Parity (even). Only 8 low bits of result are checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.Algorithm:if PF = 1 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 00000101b ; AL = 5 OR AL, 0 ; just set flags. JP label1 PRINT 'parity odd.' JMP exit label1: PRINT 'parity even.' exit: RET C Z S O P A unchanged JPE label Short Jump if Parity Even. Only 8 low bits of result are checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.Algorithm:if PF = 1 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 00000101b ; AL = 5 OR AL, 0 ; just set flags. JPE label1 PRINT 'parity odd.' JMP exit label1: PRINT 'parity even.' exit: RET C Z S O P A unchanged JPO label Short Jump if Parity Odd. Only 8 low bits of result are checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.Algorithm:if PF = 0 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 00000111b ; AL = 7 OR AL, 0 ; just set flags. JPO label1 PRINT 'parity even.' JMP exit label1: PRINT 'parity odd.' exit: RET C Z S O P A unchanged JS label Short Jump if Signed (if negative). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.Algorithm:if SF = 1 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 10000000b ; AL = -128 OR AL, 0 ; just set flags. JS label1 PRINT 'not signed.' JMP exit label1: PRINT 'signed.' exit: RET C Z S O P A unchanged JZ label Short Jump if Zero (equal). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.Algorithm:if ZF = 1 then jumpExample: include 'emu8086.inc' ORG 100h MOV AL, 5 CMP AL, 5 JZ label1 PRINT 'AL is not equal to 5.' JMP exit label1: PRINT 'AL is equal to 5.' exit: RET C Z S O P A unchanged LAHF No operands Load AH from 8 low bits of Flags register.Algorithm:AH = flags registerAH bit: 7 6 5 4 3 2 1 0 [SF] [ZF] [0] [AF] [0] [PF] [1] [CF] bits 1, 3, 5 are reserved.C Z S O P A unchanged LDS REG, memory Load memory double word into word register and DS.Algorithm:REG = first wordDS = second wordExample: ORG 100h LDS AX, m RET m DW 1234h DW 5678h END AX is set to 1234h, DS is set to 5678h.C Z S O P A unchanged LEA REG, memory Load Effective Address.Algorithm:REG = address of memory (offset)Example: MOV BX, 35h MOV DI, 12h LEA SI, [BX+DI] ; SI = 35h + 12h = 47h Note: The integrated 8086 assembler automatically replaces LEA with a more efficient MOV where possible. For example: org 100h LEA AX, m ; AX = offset of m RET m dw 1234h ENDC Z S O P A unchanged LES REG, memory Load memory double word into word register and ES.Algorithm:REG = first wordES = second wordExample: ORG 100h LES AX, m RET m DW 1234h DW 5678h END AX is set to 1234h, ES is set to 5678h.C Z S O P A unchanged LODSB No operands Load byte at DS:[SI] into AL. Update SI.Algorithm:AL = DS:[SI]if DF = 0 then SI = SI + 1else SI = SI - 1Example: ORG 100h LEA SI, a1 MOV CX, 5 MOV AH, 0Eh m: LODSB INT 10h LOOP m RET a1 DB 'H', 'e', 'l', 'l', 'o' C Z S O P A unchanged LODSW No operands Load word at DS:[SI] into AX. Update SI.Algorithm:AX = DS:[SI]if DF = 0 then SI = SI + 2else SI = SI - 2Example: ORG 100h LEA SI, a1 MOV CX, 5 REP LODSW ; finally there will be 555h in AX. RET a1 dw 111h, 222h, 333h, 444h, 555h C Z S O P A unchanged LOOP label Decrease CX, jump to label if CX not zero.Algorithm:CX = CX - 1if CX 0 then jumpelse no jump, continueExample: include 'emu8086.inc' ORG 100h MOV CX, 5 label1: PRINTN 'loop!' LOOP label1 RET C Z S O P A unchanged LOOPE label Decrease CX, jump to label if CX not zero and Equal (ZF = 1).Algorithm:CX = CX - 1if (CX 0) and (ZF = 1) then jumpelse no jump, continueExample: ; Loop until result fits into AL alone, ; or 5 times. The result will be over 255 ; on third loop (100+100+100), ; so loop will exit. include 'emu8086.inc' ORG 100h MOV AX, 0 MOV CX, 5 label1: PUTC '*' ADD AX, 100 CMP AH, 0 LOOPE label1 RET C Z S O P A unchanged LOOPNE label Decrease CX, jump to label if CX not zero and Not Equal (ZF = 0).Algorithm:CX = CX - 1if (CX 0) and (ZF = 0) then jumpelse no jump, continueExample: ; Loop until '7' is found, ; or 5 times. include 'emu8086.inc' ORG 100h MOV SI, 0 MOV CX, 5 label1: PUTC '*' MOV AL, v1[SI] INC SI ; next byte (SI=SI+1). CMP AL, 7 LOOPNE label1 RET v1 db 9, 8, 7, 6, 5 C Z S O P A unchanged LOOPNZ label Decrease CX, jump to label if CX not zero and ZF = 0.Algorithm:CX = CX - 1if (CX 0) and (ZF = 0) then jumpelse no jump, continueExample: ; Loop until '7' is found, ; or 5 times. include 'emu8086.inc' ORG 100h MOV SI, 0 MOV CX, 5 label1: PUTC '*' MOV AL, v1[SI] INC SI ; next byte (SI=SI+1). CMP AL, 7 LOOPNZ label1 RET v1 db 9, 8, 7, 6, 5 C Z S O P A unchanged LOOPZ label Decrease CX, jump to label if CX not zero and ZF = 1.Algorithm:CX = CX - 1if (CX 0) and (ZF = 1) then jumpelse no jump, continueExample: ; Loop until result fits into AL alone, ; or 5 times. The result will be over 255 ; on third loop (100+100+100), ; so loop will exit. include 'emu8086.inc' ORG 100h MOV AX, 0 MOV CX, 5 label1: PUTC '*' ADD AX, 100 CMP AH, 0 LOOPZ label1 RET C Z S O P A unchanged MOV REG, memorymemory, REGREG, REGmemory, immediateREG, immediateSREG, memorymemory, SREGREG, SREGSREG, REG Copy operand2 to operand1.The MOV instruction cannot: set the value of the CS and IP registers.copy value of one segment register to another segment register (should copy to general register first).copy immediate value to segment register (should copy to general register first).Algorithm:operand1 = operand2 Example: ORG 100h MOV AX, 0B800h ; set AX = B800h (VGA memory). MOV DS, AX ; copy value of AX to DS. MOV CL, 'A' ; CL = 41h (ASCII code). MOV CH, 01011111b ; CL = color attribute. MOV BX, 15Eh ; BX = position on screen. MOV [BX], CX ; w.[0B800h:015Eh] = CX. RET ; returns to operating system. C Z S O P A unchanged MOVSB No operands Copy byte at DS:[SI] to ES:[DI]. Update SI and DI.Algorithm:ES:[DI] = DS:[SI]if DF = 0 then SI = SI + 1DI = DI + 1else SI = SI - 1DI = DI - 1Example: ORG 100h CLD LEA SI, a1 LEA DI, a2 MOV CX, 5 REP MOVSB RET a1 DB 1,2,3,4,5 a2 DB 5 DUP(0) C Z S O P A unchanged MOVSW No operands Copy word at DS:[SI] to ES:[DI]. Update SI and DI.Algorithm:ES:[DI] = DS:[SI]if DF = 0 then SI = SI + 2DI = DI + 2else SI = SI - 2DI = DI - 2Example: ORG 100h CLD LEA SI, a1 LEA DI, a2 MOV CX, 5 REP MOVSW RET a1 DW 1,2,3,4,5 a2 DW 5 DUP(0) C Z S O P A unchanged MUL REGmemoryUnsigned multiply.Algorithm:when operand is a byte:AX = AL * operand. when operand is a word:(DX AX) = AX * operand. Example: MOV AL, 200 ; AL = 0C8h MOV BL, 4 MUL BL ; AX = 0320h (800) RET C Z S O P A r ? ? r ? ? CF=OF=0 when high section of the result is zero. NEG REGmemoryNegate. Makes operand negative (two's complement).Algorithm:Invert all bits of the operandAdd 1 to inverted operandExample: MOV AL, 5 ; AL = 05h NEG AL ; AL = 0FBh (-5) NEG AL ; AL = 05h (5) RET C Z S O P A r r r r r r NOP No operands No Operation.Algorithm:Do nothingExample: ; do nothing, 3 times: NOP NOP NOP RET C Z S O P A unchanged NOT REGmemoryInvert each bit of the operand.Algorithm:if bit is 1 turn it to 0.if bit is 0 turn it to 1.Example: MOV AL, 00011011b NOT AL ; AL = 11100100b RET C Z S O P A unchanged OR REG, memorymemory, REGREG, REGmemory, immediateREG, immediate Logical OR between all bits of two operands. Result is stored in first operand.These rules apply:1 OR 1 = 11 OR 0 = 10 OR 1 = 10 OR 0 = 0Example: MOV AL, 'A' ; AL = 01000001b OR AL, 00100000b ; AL = 01100001b ('a') RET C Z S O P A 0 r r 0 r ? OUT im.byte, ALim.byte, AXDX, ALDX, AX Output from AL or AX to port.First operand is a port number. If required to access port number over 255 - DX register should be used.Example: MOV AX, 0FFFh ; Turn on all OUT 4, AX ; traffic lights. MOV AL, 100b ; Turn on the third OUT 7, AL ; magnet of the stepper-motor. C Z S O P A unchanged POP REGSREGmemory Get 16 bit value from the stack.Algorithm:operand = SS:[SP] (top of the stack)SP = SP + 2Example: MOV AX, 1234h PUSH AX POP DX ; DX = 1234h RET C Z S O P A unchanged POPA No operands Pop all general purpose registers DI, SI, BP, SP, BX, DX, CX, AX from the stack.SP value is ignored, it is Popped but not set to SP register).Note: this instruction works only on 80186 CPU and later!Algorithm:POP DIPOP SIPOP BPPOP xx (SP value ignored)POP BXPOP DXPOP CXPOP AXC Z S O P A unchanged POPF No operands Get flags register from the stack.Algorithm:flags = SS:[SP] (top of the stack)SP = SP + 2C Z S O P A popped PUSH REGSREGmemoryimmediate Store 16 bit value in the stack.Note: PUSH immediate works only on 80186 CPU and later!Algorithm:SP = SP - 2SS:[SP] (top of the stack) = operandExample: MOV AX, 1234h PUSH AX POP DX ; DX = 1234h RET C Z S O P A unchanged PUSHA No operands Push all general purpose registers AX, CX, DX, BX, SP, BP, SI, DI in the stack.Original value of SP register (before PUSHA) is used.Note: this instruction works only on 80186 CPU and later!Algorithm:PUSH AXPUSH CXPUSH DXPUSH BXPUSH SPPUSH BPPUSH SIPUSH DIC Z S O P A unchanged PUSHF No operands Store flags register in the stack.Algorithm:SP = SP - 2SS:[SP] (top of the stack) = flagsC Z S O P A unchanged RCL memory, immediateREG, immediatememory, CLREG, CL Rotate operand1 left through Carry Flag. The number of rotates is set by operand2.When immediate is greater then 1, assembler generates several RCL xx, 1 instructions because 8086 has machine code only for this instruction (the same principle works for all other shift/rotate instructions).Algorithm:shift all bits left, the bit that goes off is set to CF and previous value of CF is inserted to the right-most position. Example: STC ; set carry (CF=1). MOV AL, 1Ch ; AL = 00011100b RCL AL, 1 ; AL = 00111001b, CF=0. RET C O r r OF=0 if first operand keeps original sign. RCR memory, immediateREG, immediatememory, CLREG, CL Rotate operand1 right through Carry Flag. The number of rotates is set by operand2.Algorithm:shift all bits right, the bit that goes off is set to CF and previous value of CF is inserted to the left-most position.Example: STC ; set carry (CF=1). MOV AL, 1Ch ; AL = 00011100b RCR AL, 1 ; AL = 10001110b, CF=0. RET C O r r OF=0 if first operand keeps original sign. REP chain instructionRepeat following MOVSB, MOVSW, LODSB, LODSW, STOSB, STOSW instructions CX times.Algorithm:check_cx:if CX 0 thendo following chain instructionCX = CX - 1go back to check_cxelse exit from REP cycleZ r REPE chain instructionRepeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 1 (result is Equal), maximum CX times.Algorithm:check_cx:if CX 0 then do following chain instructionCX = CX - 1if ZF = 1 then: go back to check_cxelse exit from REPE cycleelse exit from REPE cycleExample:see cmpsb.asm in c:\emu8086\examples\.Z r REPNE chain instructionRepeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 0 (result is Not Equal), maximum CX times.Algorithm:check_cx:if CX 0 then do following chain instructionCX = CX - 1if ZF = 0 then: go back to check_cxelse exit from REPNE cycleelse exit from REPNE cycleZ r REPNZ chain instructionRepeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 0 (result is Not Zero), maximum CX times.Algorithm:check_cx:if CX 0 then do following chain instructionCX = CX - 1if ZF = 0 then: go back to check_cxelse exit from REPNZ cycleelse exit from REPNZ cycleZ r REPZ chain instructionRepeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 1 (result is Zero), maximum CX times.Algorithm:check_cx:if CX 0 then do following chain instructionCX = CX - 1if ZF = 1 then: go back to check_cxelse exit from REPZ cycleelse exit from REPZ cycleZ r RET No operandsor even immediate Return from near procedure.Algorithm:Pop from stack: IPif immediate operand is present: SP = SP + operandExample: ORG 100h ; for COM file. CALL p1 ADD AX, 1 RET ; return to OS. p1 PROC ; procedure declaration. MOV AX, 1234h RET ; return to caller. p1 ENDP C Z S O P A unchanged RETF No operandsor even immediate Return from Far procedure.Algorithm:Pop from stack: IPCSif immediate operand is present: SP = SP + operandC Z S O P A unchanged ROL memory, immediateREG, immediatememory, CLREG, CL Rotate operand1 left. The number of rotates is set by operand2.Algorithm:shift all bits left, the bit that goes off is set to CF and the same bit is inserted to the right-most position. Example: MOV AL, 1Ch ; AL = 00011100b ROL AL, 1 ; AL = 00111000b, CF=0. RET C O r r OF=0 if first operand keeps original sign. ROR memory, immediateREG, immediatememory, CLREG, CL Rotate operand1 right. The number of rotates is set by operand2.Algorithm:shift all bits right, the bit that goes off is set to CF and the same bit is inserted to the left-most position.Example: MOV AL, 1Ch ; AL = 00011100b ROR AL, 1 ; AL = 00001110b, CF=0. RET C O r r OF=0 if first operand keeps original sign. SAHF No operands Store AH register into low 8 bits of Flags register.Algorithm:flags register = AHAH bit: 7 6 5 4 3 2 1 0 [SF] [ZF] [0] [AF] [0] [PF] [1] [CF] bits 1, 3, 5 are reserved.C Z S O P A r r r r r r SAL memory, immediateREG, immediatememory, CLREG, CL Shift Arithmetic operand1 Left. The number of shifts is set by operand2.Algorithm:Shift all bits left, the bit that goes off is set to CF.Zero bit is inserted to the right-most position.Example: MOV AL, 0E0h ; AL = 11100000b SAL AL, 1 ; AL = 11000000b, CF=1. RET C O r r OF=0 if first operand keeps original sign. SAR memory, immediateREG, immediatememory, CLREG, CL Shift Arithmetic operand1 Right. The number of shifts is set by operand2.Algorithm:Shift all bits right, the bit that goes off is set to CF.The sign bit that is inserted to the left-most position has the same value as before shift.Example: MOV AL, 0E0h ; AL = 11100000b SAR AL, 1 ; AL = 11110000b, CF=0. MOV BL, 4Ch ; BL = 01001100b SAR BL, 1 ; BL = 00100110b, CF=0. RET C O r r OF=0 if first operand keeps original sign. SBB REG, memorymemory, REGREG, REGmemory, immediateREG, immediate Subtract with Borrow.Algorithm:operand1 = operand1 - operand2 - CFExample: STC MOV AL, 5 SBB AL, 3 ; AL = 5 - 3 - 1 = 1 RET C Z S O P A r r r r r r SCASB No operands Compare bytes: AL from ES:[DI].Algorithm:ES:[DI] - ALset flags according to result:OF, SF, ZF, AF, PF, CFif DF = 0 then DI = DI + 1else DI = DI - 1C Z S O P A r r r r r r SCASW No operands Compare words: AX from ES:[DI].Algorithm:ES:[DI] - AXset flags according to result:OF, SF, ZF, AF, PF, CFif DF = 0 then DI = DI + 2else DI = DI - 2C Z S O P A r r r r r r SHL memory, immediateREG, immediatememory, CLREG, CL Shift operand1 Left. The number of shifts is set by operand2.Algorithm:Shift all bits left, the bit that goes off is set to CF.Zero bit is inserted to the right-most position.Example: MOV AL, 11100000b SHL AL, 1 ; AL = 11000000b, CF=1. RET C O r r OF=0 if first operand keeps original sign. SHR memory, immediateREG, immediatememory, CLREG, CL Shift operand1 Right. The number of shifts is set by operand2.Algorithm:Shift all bits right, the bit that goes off is set to CF.Zero bit is inserted to the left-most position.Example: MOV AL, 00000111b SHR AL, 1 ; AL = 00000011b, CF=1. RET C O r r OF=0 if first operand keeps original sign. STC No operands Set Carry flag.Algorithm:CF = 1C 1 STD No operands Set Direction flag. SI and DI will be decremented by chain instructions: CMPSB, CMPSW, LODSB, LODSW, MOVSB, MOVSW, STOSB, STOSW.Algorithm:DF = 1D 1 STI No operands Set Interrupt enable flag. This enables hardware interrupts.Algorithm:IF = 1I 1 STOSB No operands Store byte in AL into ES:[DI]. Update DI.Algorithm:ES:[DI] = ALif DF = 0 then DI = DI + 1else DI = DI - 1Example: ORG 100h LEA DI, a1 MOV AL, 12h MOV CX, 5 REP STOSB RET a1 DB 5 dup(0) C Z S O P A unchanged STOSW No operands Store word in AX into ES:[DI]. Update DI.Algorithm:ES:[DI] = AXif DF = 0 then DI = DI + 2else DI = DI - 2Example: ORG 100h LEA DI, a1 MOV AX, 1234h MOV CX, 5 REP STOSW RET a1 DW 5 dup(0) C Z S O P A unchanged SUB REG, memorymemory, REGREG, REGmemory, immediateREG, immediate Subtract.Algorithm:operand1 = operand1 - operand2Example: MOV AL, 5 SUB AL, 1 ; AL = 4 RET C Z S O P A r r r r r r TEST REG, memorymemory, REGREG, REGmemory, immediateREG, immediate Logical AND between all bits of two operands for flags only. These flags are effected: ZF, SF, PF. Result is not stored anywhere.These rules apply:1 AND 1 = 11 AND 0 = 00 AND 1 = 00 AND 0 = 0Example: MOV AL, 00000101b TEST AL, 1 ; ZF = 0. TEST AL, 10b ; ZF = 1. RET C Z S O P 0 r r 0 r XCHG REG, memorymemory, REGREG, REG Exchange values of two operands.Algorithm:operand1 < - > operand2Example: MOV AL, 5 MOV AH, 2 XCHG AL, AH ; AL = 2, AH = 5 XCHG AL, AH ; AL = 5, AH = 2 RET C Z S O P A unchanged XLATB No operands Translate byte from table.Copy value of memory byte at DS:[BX + unsigned AL] to AL register.Algorithm:AL = DS:[BX + unsigned AL]Example: ORG 100h LEA BX, dat MOV AL, 2 XLATB ; AL = 33h RET dat DB 11h, 22h, 33h, 44h, 55h C Z S O P A unchanged XOR REG, memorymemory, REGREG, REGmemory, immediateREG, immediate Logical XOR (Exclusive OR) between all bits of two operands. Result is stored in first operand.These rules apply:1 XOR 1 = 01 XOR 0 = 10 XOR 1 = 10 XOR 0 = 0Example: MOV AL, 00000111b XOR AL, 00000010b ; AL = 00000101b RET C Z S O P A 0 r r 0 r ?copyright © 2005 emu8086.comall rights reserved.
