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Intel 8086 and 8088

The Intel 8086/8088 family of microprocessors is a 16 bit architecture on a 16 bit (8086) or an 8 bit (8088) bus. The 8088 was the processor in the original IBM PC, and has evolved into the most popular processor used today in PC's and servers.

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Which register is used as an offset address for the string instruction destination in the microprocessor?

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DI is used as an offset address for string instruction destinations in the microprocessors.

What are the basic difference Intel 80386 real protected and virtual 8086 modes?

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What is the pin diagram of ic 7812?

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Asked by Wiki User

http://hamradio.lakki.iki.fi/new/Datasheets/transistor_pinouts/case-14.gif

Picture in context can be found here:

http:/hamradio.lakki.iki.fi/new/Datasheets/transistor_pinouts

What is the difference between the Intel 8085 and the Intel 8086?

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The Intel 8085 is an 8 bit microprocessor created in 1977.

The Intel 8086 is a 16 bit microprocessor created in 1978. The 8086 was the first chip to start the x86 architecture family.

8085 contains 16-bit address bus and 8-bit data bus

8086 contains 20-bit address bus and 16-bit data bus..

In 8085 the clock speed is 3MHZ

where as in 8086 the clock speed is 5MHZ.
there are two differences btw 8085&8086

1. 8086 has 6 byte queue but 8085 has 4 byte queue

2. 8086 has 16 bit data bus where as 8085 has 8 bit data bus

Why is it if MARIE has 4k words of main memory and addresses must have 12 bits?

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4K (4096) of addressable space is defined by 12 bits of address space, because 212 = 4096.

What is the program in 8086 to convert a hexadecimal number to its ASCII code?

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  • LXI H, 4150 ; Point to data
  • LXI B, 0000 ; Initialize hundreds= 0, Tens=0
  • MOV A, M ; Get hex data to A
  • LOOP: SUI 64
  • JC LOOP 1
  • INR B ; hundreds= hundreds+1
  • JMP LOOP
  • LOOP 1: ADI 64 ; if subtracted extra, add it clear carry flag
  • LOOP 2: SUI 0A
  • JC LOOP 3
  • INR C ; Tens=tens+1
  • JMP LOOP 2
  • LOOP 3: ADI 0A ; If subtracted extra, add it again
  • INX H ; A = Units
  • MOV M, B ; store hundreds
  • MOV B, A ; Combine Tens in C &
  • MOV A, C ; Units in A to form a
  • RLC ; Single 8-bit number
  • RLC
  • RLC
  • RLC
  • ADD B
  • INX H
  • MOV M, A ; Store tens & Units
  • HLT

Can you use sp as offset address holder with cs?

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Asked by SivaParvathi

SP is the stack pointer and can be used in the stack operations. It cannot be used for fetching the instruction

What is the highest memory address?

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The highest memory address in the 8086/8088 is FFFFFH.

Why a segment can not start from the physical address 77777?

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For any segment base address, segment first physical address will have 0 in the least

significant position in hexadecimal format.

Let say, our Segment base =0x1234, and we calculate segment first physical address as

0x12340

IS Two important components of the system unit are the microprocessor and the hard disk?

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The CPU comprised of three main parts: AlU(ARITHMETIC LOGIC UNIT):- Does the actual Logic comparisons that need to be processed. Control Unit:-Can execute and store the results coming out of ALU. Registers:- store the data that is to be executed next.

How general purpose registers increases speed of operation?

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I am not quite sure how significant this is. The reason, however, is that accessing a register, which is part of the CPU, is faster than accessing RAM memory, which is located on a separate chip.

I am not quite sure how significant this is. The reason, however, is that accessing a register, which is part of the CPU, is faster than accessing RAM memory, which is located on a separate chip.

I am not quite sure how significant this is. The reason, however, is that accessing a register, which is part of the CPU, is faster than accessing RAM memory, which is located on a separate chip.

I am not quite sure how significant this is. The reason, however, is that accessing a register, which is part of the CPU, is faster than accessing RAM memory, which is located on a separate chip.

Pin configuration of 10 pin 7 segment display?

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Do you have a virtual copy of game plan sharpshooter,coney island or pinball lizard .How much would it cost ?

What is the size of address bus in 8086?

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Asked by Wiki User

The address bus in the 8085 is 16 bits wide.

What is the difference between 32 bit microprocessor and 64 bit microprocessor?

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The fundamental difference between a 32-bit and 64-bit microprocessor is what their names suggest: the size of the basic integer operations, also called the 'native' size of a CPU's calculations. The native size of a CPU determines a whole bunch of related characteristics.

For instance, all integer calculations are done using the native size; this matters in terms of performance for several reasons:

  • if you add two integers smaller than the native size, it requires only a single operation.
  • if you add two integers larger than the native size, you must perform 3 operations (add the upper values, add the lower values, then combine).

For instance, if you wanted to add two 20-bit numbers, on both the 32-bit CPU and 64-bit CPU it would require a single operation. However, if you wanted to add two 40-bit numbers, it would require only 1 operation on a 64-bit CPU, but 3 operations on a 32-bit CPU.

The native size of a CPU also determines things like the maximum addressable memory - thus, a 32-bit CPU can address up to 2^32 = 4GB of memory, while a 64-bit system can address up to 16 Exabytes. It also determines the minimum size of information that has to be processed - when fetching information from caches and memory, no operation can be done with information less than the native size. Thus, 64-bit CPUs are more demanding on memory subsystems, as they need to process information in 64-bit chunks, rather than 32-bit ones.

Which protocol is used to convert logical IP addresses to physical MAC addresses?

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Asked by Wiki User

Address Resolution Protocol (ARP)

ARP is primarily used to translate IP Addresses to Ethernet MAC Addresses.

What is the difference between minimum mode and maximum mode?

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Asked by Wiki User

Minimum mode in the 8086/8088 provides the functionality of the 8288 bus controller, which means that functions like HOLD, HLDA, WR-, M/IO-, DT/R-, DEN-, ALE, and INTA- come off of the 8086/8088.

Maximum mode means that these functions come off of the 8288, in somewhat enhanced form, and the pins are replaced with new meanings like RQ-/GT0-, RG-/GT1-, LOCK-, S2-, S1-, S0-, QS2, and S21, giving the processor extra capabilities.

Explain about segment registers in 8086MP?

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Asked by Wiki User

There are four segment registers in the 8086/8088 processor, CS, DS, ES, and SS, also known as Code Segment, Data Segment, Extra Segment, and Stack Segment. Any time an address is generated by the processor, it is added to the value of one of the segment registers, after that segment register is effectively multiplied by 16, or left shifted four bits, in order to generate the physical address that accesses memory. This gives an effective address range of 20 bits, or 1mb, but note that only 64kb is addressable through any segment register at one time, unless you stop to change the contents of that segment register. This is known as a segmented architecture. By default, the CS register is used when fetching instructions, the DS register is used when accessing data, the SS register is used when accessing the stack, and the ES register is used during certain string type instructions. If desired, an instruction prefix can be used to override, such as forcing use of CS instead of DS when using a table contained within opcode space.

Consider a 16 bit microprocessor with a 16 bit external data bus driven by an 8 bit MHz input cycleswhat is maximum data transfer rate across the bus that this microprocessor can sustain?

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Asked by Wiki User

Minimum bus cycle duration = 4 clock cycles Bus clock = 8 MHz Maximum bus cycle rate = 8 M / 4 = 2 M /s Data transferred per bus cycle = 16 bit = 2 bytes Data transfer rate (per second) = Bus cycle rate * data per cycle = 2 M * 2 = 4 M bytes per second

What is difference between interupt and subroutine?

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Asked by Wiki User

Interrupt is the signal generated by the input/output devices in order to take the attention of the processor.

When the processor receives the interrupt signals it checks the priority status and finish the current fetch and execute cycle and (if the priority status is high) allow the input/output device to process their tasks. Then previous fetch and execute cycle is continued. This is called interrupt service routine.

The programs are broken down in to small sub programs which are called subroutines. Then the program reusability, readability, maintainability ...etc will be increased.

A Explain the use of Code Segment CS and data segment DS register in 8086 microprocessor?

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Asked by Wiki User

Code segment (CS) is a 16-bit register containing address of 64 KB segment with processor instructions. The processor uses CS segment for all accesses to instructions referenced by instruction pointer (IP) register. CS register cannot be changed directly. The CS register is automatically updated during far jump, far call and far return instructions. Data segment (DS) is a 16-bit register containing address of 64KB segment with program data. By default, the processor assumes that all data referenced by general registers (AX, BX, CX, DX) and index register (SI, DI) is located in the data segment. DS register can be changed directly using POP and LDS instructions. Code segment (CS) is a 16-bit register containing address of 64 KB segment with processor instructions. The processor uses CS segment for all accesses to instructions referenced by instruction pointer (IP) register. CS register cannot be changed directly. The CS register is automatically updated during far jump, far call and far return instructions. Data segment (DS) is a 16-bit register containing address of 64KB segment with program data. By default, the processor assumes that all data referenced by general registers (AX, BX, CX, DX) and index register (SI, DI) is located in the data segment. DS register can be changed directly using POP and LDS instructions.

What is offset address in 8086 processor?

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Asked by Wiki User

The offset address in an 8086/8088 is the logical address that the program "thinks about" when it addresses a location in memory. The Execution Unit (EU or CPU) is responsible for generating the offset address. The Bus Interface Unit (BIU), on the other hand, takes the offset address and adds it to four times the selected segment register value in order to determine a real address, which is now 20-bits in length.

Some programs do deal with segment addresses as well - these are called far pointers instead of near pointers - but the program has to do more than one step to load both the offset and the segment address - a complexity created by running in a 16-bit environment.

What is the direction of information flow on the the address and data bus?

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Asked by Wiki User

The address bus is unidirectional(only in one direction) in the processor. So, the flow of information on this bus is from the microprocessor to the attached device(memory module).