the address that is obtained by applying any specified indexing or indirect addressing rules to specified address
Give the effective address if the segment register is AA03 and the offset register is 0200.
Physical address in the 8086/8088 is {Selected Segment Register} * 16 + {Effective Offset Address}. It is a 20-bit address .
Offset address is also known as displacement.By adding this offset value to a base address,address of a specific locaction in memory can be accessed
An offset address is a relative address rather than an absolute address. You use offsets to refer to memory relative to an absolute address. For instance, array indices are implemented using offsets from the start address of the array, such that element 0 is at offset 0 and element 5 is at offset 5.
The 8086 forms a 20 bit address by adding the effective address (a 16 bit value) to a segment register (another 16 bit value) which is left shifted by 4. That gives a 20 bit address in the range of 00000H to FFFFFH. cs register holds the base address (16 bit) and the IP has the offset. (ex): CS --->348A IP --->4214(offset) generation of 20 bit: CS*10+IP (ie) 348A0 04214 + ---------------------- 38AB4(20 BIT) ----------------------
In software Engineering KPA denotes.
Base plus displacement.
your question is wrong. it should be "can physical address and logical address be same" answer is no because logical address is the combination of page number and offset whereas physical address is the combination of physical page[frame] and offset
displacement from base address
Load effective address, in assembler terms, and in the case of for example "lea eax, [esp-8]" means "please compute and put the address of [esp-8] into the register eax". In other terms, "mov" works only on values, except you tell it to get the address of your source arg (you could do mov eax, offset [ebp-8]), while "lea" works on addresses only.
The offset is usually the difference between the address of a module and the specific location being referenced.
DI is used as an offset address for string instruction destinations in the microprocessors.