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Well, let's say you have the following Assembler statement:

MOV AX, 0005

Each processor (depending on the processor architecture, being some of them: SPARC, Intel 80x86, Motorola...) translates each Assembler mnemonic and register into Machine Code according to an Opcode Table.

Think of an Opcode Table this way:

Instruction OpCode

-----------------------------------

MOV A1

ADD A2

SUB A3

MUL A4

DIV A5

...

AX B0

BX B1

CX B2

...

Each mnemonic/register has its corresponding hex code for the processor to understand the operation, so:

MOV AX, 0005

Could be translated as:

A1 B0 0005

Hopefully this gives you an idea of how a processor assembles code and generates machine code.

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