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8086 is a pipelined processor.

In 8086 to speed up the execution of a program,instruction fetching and executing the instruction are overlapped each other.This is a part of pipelined technique.

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12y ago
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7y ago

Instruction processing consists of several steps. Depending on the complexity (and cost) of the computer, some of these steps may be done concurrently:

  • Fetch the instruction,
  • decode instruction operation code to determine what it should do,
  • resolve addressing modes based on the operation code to get operand addresses.
  • Fetch data from registers or memory address.,
  • execute instruction,
  • Move results of instruction execution to memory address, register, or new instruction address (if it is a branch/jump instruction.

Modern computers have the ability, while executing an instruction, to perform some of the above functions preparing the next instruction or instructions for execution. This preparing of the next instructions "coming down the pipe" for processing is called pipelining.

The simple 8086, while executing one instruction, has a six byte instruction queue and the ability to fetch the next six bytes after the current instruction and prepare it for processing. Since instructions vary in size, as bytes are taken from this instruction queue, the next bytes are fetched from memory into the queue to reduce the memory fetch time for the next instruction. More sophisticated computers can prepare the next several instructions after the current instruction and prepare them for processing. Some advanced machines can pipeline up to the next 20 instructions (or more) and can even execute more than one instruction at the same time. If one of the instructions changes the instruction flow by branching to another part of memory, the rest of the pipeline is cleared and loaded from the new execution address. If when two instructions are executed simultaneously, the results of the first instruction will affect the next one, the results of the next instruction are cleared and its processing is restarted.

The 8086 CPU has two main components. The Execution Unit (EU) tells the Bus Interface Unit (BIU) from where to fetch instructions as well as to read data. The EU gets the opcode of an instruction from an instruction queue and decodes it or executes it. The BIU and EU operate independently. While the EU is executing an instruction the BIU fetches instruction codes from memory and stores them in the queue. This type of overlapping operation of the BIU and EU functional units of a microprocessor is called pipelining.

In the 8086/8088 there is a 6 byte instruction prefetch queue which is used to prefetch instruction bytes while the processor is working on processing earlier bytes. In this way, it is statistically possible that the next opcode can be fetched and available to the processor when it is done with the prior opcode and it wants the next opcode. This is called pipelining, or caching, and it can speed up processing. Of course, if the processor branches, the prefetched instruction bytes have to be discarded, but that's "the way the cookie crumbles." Modern processors actually have branch prediction algorithms to help this issue.

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12y ago

execution and prefetching the instruction simultaneosly is called pipelining

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13y ago

There is no pipelining concept in the 8085 microprocessor.It is only in the 8086 micro processor an advanced processor of the 8085.

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Q: Why pipelining used in 8086?
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