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Random Access Memory (RAM) is typically made up from an array of cells arranged in rows and columns. Each cell represents one bit and each has a transistor and a capacitor. The capacitor can store an electric charge and if the charge is above that of a control level, the cell is set (denoting 1), otherwise it is not set (denoting 0). The transistor is used to both fill and drain the capacitor to switch its state. The control level is typically 50% of the capacity.

However, the capacitor is like a leaky cup -- the charge will quickly drain away within a few milliseconds. Thus the RAM must be refreshed thousands of times a second to ensure no set bits fall below the control level. RAM with a refresh of rate of 100 nanoseconds take 100ns to refresh every single bit. During a refresh cycle, if a capacitor is above the control level then it is immediately refilled, otherwise it is allowed to drain completely.

To access any bit of memory, a row address selector (RAS) selects the row while its associated column address selector (CAS) selects the column. RAS/CAS is used to both read and write bits. By selecting successive columns along the same row, groups of bits can be read in quick succession, thus making it possible to read or write 32-bit or 64-bit values at a time, depending on the architecture.

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12y ago

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