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UP-DOWN COUNTER
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity updowncount is
port(reset,c,clk:in std_logic;
s:inout std_logic_vector(3 downto 0));
end updowncount;
architecture Behavioral of updowncount is
begin
process(reset,c,clk,s)
begin
if reset='1' then
s<="0000";
elsif c='1' and rising_edge(clk) then
s<=s+1;
elsif c='0' and rising_edge(clk) then
s<=s-1;
end if;
end process;
end Behavioral;UP-DOWN COUNTER
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity updowncount is
port(reset,c,clk:in std_logic;
s:inout std_logic_vector(3 downto 0));
end updowncount;
architecture Behavioral of updowncount is
begin
process(reset,c,clk,s)
begin
if reset='1' then
s<="0000";
elsif c='1' and rising_edge(clk) then
s<=s+1;
elsif c='0' and rising_edge(clk) then
s<=s-1;
end if;
end process;
end Behavioral;
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