Given two inputs, A and B. Use one NAND as an inverter (one source to both inputs) for A.
Do the same for B. Use one NAND gate with inputs \A (not A, the output from the first gate) and B.
Use one NAND gate with inputs A and \B. Use one last NAND gate with inputs coming from the two previous gates. Its output will behave like an XOR gate.
Alternatively: Gates G1, G2, G3, G4, arrange in a diamond with G1 and G4 at the left and right vertices, A input along top edge, B input along bottom edge. G2 at top center, G3 at bottom center. A goes to G1 and G2, B goes to G1 and G3, G2 and G3 go to G4.
Net list: A - G1i1 A - G2I1 B - G1i2 B - G3I2 G1o - G2i2 G1o - G3i1 G2o - G4i1 G3o - G4i2 G4o - A^B
To make a full subtractor, you need an XOR and a NAND gate.
For 2-input EX-OR gate, if one input is A, the other input is B, and the output is Y. Then the Boolean expression for EX-OR (XOR) function (gate) is Y=A⊕B The output Y is true if either input A or if input B is true, but not both.Y= ( (A and NOT B) or (NOT A and B) ) ;
Check this link http://www.dumpt.com/img/viewer.php?file=bd6b3mqsa66fhr6c76l1.bmp
CD4070BE, SN74HC86N, SN74ACT86N, SN74LS86AN, CD74ACT86E, and CD74HCT86E are some of them
Exclusive Or means "one and only one of many", so the truth table of a 3 input XOR gate would be 000 0 001 1 010 1 011 0 100 1 101 0 110 0 111 0 ... or 111 1 ... see note Many references say that 3 input XOR gate's output should be 1 when the no of 1s in inputs is Odd, and 0 otherwise. So in the given truth table, when the input is 111 output must be 1 , i.e. 111 1 plz note -- for 111 1 must be the optput.. i confirmed it
XORing X with 1 gives X', i.e., NOT(X). If we are able to construct a NAND (AND) using XOR, we can also obtain AND (NAND) from it, which makes XOR a universal gate since inverted inputs to a NAND (AND) will give OR (NOR). However XOR is not a universal gate! Therefore we cannot obtain NAND (AND) using XOR. :-) By, Tirtha Sarathi Ghosh Class 10 IIT Kanpur Aspirant
No, XOR gate is a not a universal gate. There are basically two universal gates NAND and NOR.
To make a full subtractor, you need an XOR and a NAND gate.
All other logic gates can be made using XOR and XNOR, but to get NOT, you need to do (input) XOR 1 or (input) XNOR 0, but with NAND, you don't need 1: (input) NAND (input).
Its possible to design a 4-i/p xor gate using only 2-i/p nand gates Although the design turns out to be quite complex and comprises of 21 NAND gates : F = (A'B+AB')(C'D'+CD) + (A'B'+AB)(C'D+CD') Above given equation is the o/p equation for the circuit .
As such an OR gate should do the job...but if the question is of using gates other than the simple OR, it should be a combo of NOR and NOT gates; where-in, the NOT gate comes after the NOR gate. Factfully speaking: The output of a NOR gate when fed to a NOT gate shall give you an OR gate. cheers :) Anish Murthy Airpula, RF Design Engineer (F.A.E) Ceramic & Microwave Products Group, Dover Corporation Inc, United States of America
Seven gates, they are: not, and, or, nor, nand, xor, xnor.
xor and xnor gates are derived from not gate
yes... xor is derived gate from primary gates
____ ____ c ----->|xor |------------> s a ->|xor |-+------------>|____| b ->|____| | _____ _____ +--->|nand |------>|nand |--> c c ----->|_____| +-->|_____| _____ | a ----->|nand |--+ b ----->|_____|
No. OR is not functionally complete, so you can not use it to derive any other logical expression. The reason for this is because you can only construct the following expressions out of only OR gates: A OR B A OR A Because of the Idempotency theorem, A OR A simply reduces to A, so we are left with A OR B, which we can not use to derive any other logical circuits. At the very least, we would also need a NOT gate. This is why NOR and NAND are functionally complete: you can derive a NOT gate by using A NAND A or A NOR A.
No. OR is not functionally complete, so you can not use it to derive any other logical expression. The reason for this is because you can only construct the following expressions out of only OR gates: A OR B A OR A Because of the Idempotency theorem, A OR A simply reduces to A, so we are left with A OR B, which we can not use to derive any other logical circuits. At the very least, we would also need a NOT gate. This is why NOR and NAND are functionally complete: you can derive a NOT gate by using A NAND A or A NOR A.