0
As such an OR gate should do the job...but if the question is of using gates other than the simple OR, it should be a combo of NOR and NOT gates; where-in, the NOT gate comes after the NOR gate.
Factfully speaking:
The output of a NOR gate when fed to a NOT gate shall give you an OR gate.
cheers :)
Anish Murthy Airpula,
RF Design Engineer (F.A.E)
Ceramic & Microwave Products Group,
Dover Corporation Inc,
What else can I help you with?
Minimum Number of NAND gates required to realize the function AB?
A&B = ((A&B)')' So two, it would go a - | ==NAND--=NAND-- b - | By using two NAND gates back-to-back, you can create a normal AND gate.
What are K maps in digital electronics?
k map is karnaugh map . it is just a method to simplify or minimize the boolean equations so that it becomes easier to realize a circuit using minimum no. of gates.
Why is Bill Gates name gates?
His last name is Gates, because Gates is his family's name. His last name Gates comes from his ancestors.
What is the minimum no of 2 inputs NAND gates used to perform function of 2 inputs OR gates?
ans. 3 nand gates resoon :- OR GATE :- x+y NAND GATE :- x'+y' LOGIC :-so the logic is is we apply NAND to the inputs x' and y' instead of xand y we would get x+y DESIGN PROCEDURE 1. for inverting the input x and y can be done by NAND gates , 2. take a NAND gate and pass both x in both the inputs it means x NAND x gives you x' 3. follow similar procedure for inverting y 4. and then all the outputs of those NAND gates as the inputs of another NAND gate
Do 2 input nor gates form a complete set of logic gates?
nor as well as nand gate are universal gates they both can be used as a complete set of logic gates
Minimum Number of NAND gates required to realize the function AB?
A&B = ((A&B)')' So two, it would go a - | ==NAND--=NAND-- b - | By using two NAND gates back-to-back, you can create a normal AND gate.
Minimum number of nand gates required to implement a 2-input exclusiveor?
4
Minimum number of and gates required to form full and half adder?
9,to implement a half adder 5 nand gates and for a full adder,another xor gate is required consisting of 4 nand gates. thus a total of 9 nand gates are required for a full adder.
What are the minimum number of inputs that can be given to the logic gates?
A: two
How many NAND gates required for Ex-OR?
4 as a minimum, but you can use more if you really want to.
Minimum number of nand gates required to form full and half adder?
Check this link http://www.dumpt.com/img/viewer.php?file=bd6b3mqsa66fhr6c76l1.bmp
What is a NMOS PLA?
NMOS PLA is a Programmable Logic Array which is designed by employing NMOS technology i.e. by employing nmos transistors to realize the required gates of PLA. PLA is a combination AND gates and OR gates to produced sum of products terms needed for realizing the required combinational logic. It consists of an array of AND gates followed by OR plane. the connections to the AND and OR inputs can be programmed based on our needs.
What are K maps in digital electronics?
k map is karnaugh map . it is just a method to simplify or minimize the boolean equations so that it becomes easier to realize a circuit using minimum no. of gates.
How many NAND gates are required to obtain OR gate?
two nand gates
How far back are you required to stop from railroad tracks?
Well you are required to stop 3 feet minimum of the tracks but im sure if the tracks are operational there will be gates that come up and down they are usually about 10 feet away
What age did bill gates realize he wanted to start a business?
13 year
How many NAND gates are required to obtain AND operation?
by multiplying two NAND gates
