9,to implement a half adder 5 nand gates and for a full adder,another xor gate is required consisting of 4 nand gates. thus a total of 9 nand gates are required for a full adder.
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12 NOR gates are required to implement full adder
4
You cannot design a full adder using only OR gates. You also need AND gates. Typically, this can be done with just NAND gates.
i have the same question. please some1 answer it...
12
A: two
4 as a minimum, but you can use more if you really want to.
A&B = ((A&B)')' So two, it would go a - | ==NAND--=NAND-- b - | By using two NAND gates back-to-back, you can create a normal AND gate.
ab+bc
As such an OR gate should do the job...but if the question is of using gates other than the simple OR, it should be a combo of NOR and NOT gates; where-in, the NOT gate comes after the NOR gate. Factfully speaking: The output of a NOR gate when fed to a NOT gate shall give you an OR gate. cheers :) Anish Murthy Airpula, RF Design Engineer (F.A.E) Ceramic & Microwave Products Group, Dover Corporation Inc, United States of America
A full adder can be constructed using basic logic gates: XOR, AND, and OR gates. Specifically, two XOR gates are used to calculate the sum, while two AND gates and one OR gate are employed to determine the carry-out. The first XOR gate takes the two input bits, and the second XOR gate incorporates the carry-in. The AND gates handle the carry generation, with the OR gate combining the outputs to produce the final carry-out.