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Using NAND gatesNOTFigure 12.10: Realizing a NOT gate using a NAND gate
OR The following statements are called DeMorgan's Theorems and can be easily verified and extended for more than two variables.
(12.1)(12.2)
(12.3)(12.4)In general: (12.5)Thus :(12.6)
Now it is easy to see that , which can be checked from the truth table easily. The resulting realization of OR gate is shown in 12.11
Figure 12.11: Realization of OR gate by NAND gates
AND gateFigure 12.12: Realization of AND gate by NAND gates
X-OR gate
(12.7)
Clearly, this can be implemented using AND, NOT and OR gates, and hence can be implemented using universal gates.
Figure 12.13: X-OR gate
X-NOR gate
(12.8)
Again, this can be implemented using AND, NOT and OR gates, and hence can be implemented using universal gates, i.e., NAND or NOR gates.
Figure 12.14: X-NOR gate
Next: Boolean Expressions Up: Universality of certain gates Previous: Universality of certain gates Contentsynsingh 2007-07-25
XORing X with 1 gives X', i.e., NOT(X). If we are able to construct a NAND (AND) using XOR, we can also obtain AND (NAND) from it, which makes XOR a universal gate since inverted inputs to a NAND (AND) will give OR (NOR). However XOR is not a universal gate! Therefore we cannot obtain NAND (AND) using XOR. :-) By, Tirtha Sarathi Ghosh Class 10 IIT Kanpur Aspirant
pass the inputs through an nand gate and again pass them through inverter,which is again formed by an nand gate
ans. 3 nand gates resoon :- OR GATE :- x+y NAND GATE :- x'+y' LOGIC :-so the logic is is we apply NAND to the inputs x' and y' instead of xand y we would get x+y DESIGN PROCEDURE 1. for inverting the input x and y can be done by NAND gates , 2. take a NAND gate and pass both x in both the inputs it means x NAND x gives you x' 3. follow similar procedure for inverting y 4. and then all the outputs of those NAND gates as the inputs of another NAND gate
A&B = ((A&B)')' So two, it would go a - | ==NAND--=NAND-- b - | By using two NAND gates back-to-back, you can create a normal AND gate.
NAND
NOT Gate
When the two input terminals of a NAND gate are short circuited, it acts as a NOT gate.
A: NAND implies not and to be true both input must be hi or true <> There are two flavors of NAND gate. The positive input/negative output NAND will have a low output if and only if both inputs are high. The negative input/positive output NAND will have a high output if and only if both inputs are low.
That package contains four 2-input NAND gates with Schmitt-trigger inputs.
A 2 input NAND gate requires 4 NOR gates.A 3 input NAND gate requires 5 NOR gates.A 4 input NAND gate requires 6 NOR gates.etc.
I suppose so. If a three input NAND is used as a two input device, the third input can be viewed as an inhibit input. Also some NAND devices can be "3 stated" where the output goes to a high impedance.
A: It is simply a function of negating a true input, the other characteristics s that it is limited in fan-in fan -out capabilities
Short both the inputs, if '0' is given as the input output will be '1' and if '1' is given as a input the output will be '0'
All other logic gates can be made using XOR and XNOR, but to get NOT, you need to do (input) XOR 1 or (input) XNOR 0, but with NAND, you don't need 1: (input) NAND (input).
Short the inputs together. Logic: A High input, with the inputs shorted together, will be H+H at the input side of the NAND gate, therefore resulting in a low output. A Low input, with both inputs shorted together, is L+L for inputs, resulting in a High output. Also, a NOR gate can be used in exactly the same way.
XORing X with 1 gives X', i.e., NOT(X). If we are able to construct a NAND (AND) using XOR, we can also obtain AND (NAND) from it, which makes XOR a universal gate since inverted inputs to a NAND (AND) will give OR (NOR). However XOR is not a universal gate! Therefore we cannot obtain NAND (AND) using XOR. :-) By, Tirtha Sarathi Ghosh Class 10 IIT Kanpur Aspirant
yes (a or b)' = a' and b' a or b = (a' and b')' a or b = a' nand b'