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Multiplexing is where you represent more than one bit (byte, word, etc.) on one wire (bus, etc.) in different units of time.

In the Intel 8085, the low order address bus and the data bus are multiplexed, each with 8 bits shared on one 8 but bus. There are four strobes involved...

ALE, Address Latch Enable, means that the bus represents address information, specifically the low order address. External hardware is expected to strobe the bus on the falling edge of ALE. Actual address validity occurs somewhat before, around the one third point of ALE, depending on clock speed, so normally ALE is a passthrough strobe, giving external hardware a bit of extra time to decode the address.

WR-, Write Strobe, means that the bus represents data information to write to IO or memory. External hardware is expected to strobe the data on the rising edge of WR-. WR- is low for one and a half clock cycles, not counting wait cycles. The data bus is held valid for one half additional clock cycle in order to assure data setup and hold times.

RD-, Read Strobe, means that the bus represents data information to read from IO or memory. External hardware is expected to drive the data during RD- low, with the processor strobing the data one half clock cycle prior to RD- going high. RD- is held true (low) for one and a half clock cycles, not counting wait cycles. Note very carefully that the timing from ALE to data strobe point is not the same for write cycles versus read cycles. This is by design.

INTA-, Interrupt Acknowledge, means that the bus represents data information to read from an interrupt controller. External hardware is expected to drive the data during INTA- low, with the same timing as RD-, providing an interrupt vector, either an RST or a CALL instruction. This is in response to an INTR, Interrupt Request, signal.

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