What is an advantage of the J-K flip-flop over the S-R type flip-flop?

Answer 1

no indeterminate state

Answer 2

1. An SR flip-flop has just 2 inputs: Set & Reset, asserting Set will set the flip-flop, asserting Reset will reset the flip-flop, asserting both will put the flip-flop in a meta-stable state with no defined final state after they are deasserted.
2. A JK flip-flop has 3 inputs and operates in a master-slave mode: J, K & Clock, you must assert and deassert the Clock for the outputs to change state, asserting J will set the flip-flop after the Clock cycles, asserting K will reset the flip-flop after the Clock cycles, asserting both will toggle the flip-flop after the Clock cycles. Most JK flip-flops have a Reset input too, a few may also have a Set input.
3. A D flip-flop has 2 inputs and operates in an edge triggered mode: D & Clock, you must assert the Clock for the outputs to change state, asserting D before and through the Clock edge will set the flip-flop, deasserting D before and through the Clock edge will reset the flip-flop. Most D flip-flops have both Set and Reset inputs too.

The first flip-flop was invented in 1919 and is called the Eccles-Jordan Trigger Circuit, for its two coinventors. It was a Toggle flip-flop, with only a Clock input. It had false triggering and stability problems, but found much use in cosmic ray and radiation meter scaling counters. Much literature even well into the 1960s still referred to flip-flops as Triggers.

The word flip-flop as applied to these circuits comes from the sound produced when one output was used to drive a speaker.

Answer 3

JK allows you to toggle without knowing the previous state.

Answer 4

we cannot have input 1,1 this is disadvantage,but the circuit is simple the advantage

Answer 5

The question is asking the difference between two identical things - SR and SR flip flops. Please restate the question.

Answer 6

jk does not have invalid condition

Answer 7

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