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This is a state that disconnects the gate from the line it drives so that another gate can connect to it and drive it instead. This permits sharing so that multiple sources can drive common lines without fighting and/or damaging each other.

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How tristate occurs in a microcontroller?

Tristate in a microcontroller occurs when a pin is configured to operate in a high-impedance state, effectively disconnecting it from the circuit. This is typically achieved by configuring the pin as an input or by setting it to a special mode that allows it to neither drive a high nor a low signal. This state is useful for preventing bus contention when multiple devices share the same communication lines, allowing only one device to drive the line at any given time. In this way, tristate control is essential for managing data flow in multi-device environments.


What is tristate logic and what are its applications?

An output that can be placed in any of three (tri-) states: high, low, and disconnected. The disconnected state is provided so that these outputs can be used to drive common shared buses with all tristate outputs kept in the disconnected state except one, that one will drive the buss then in the next buss cycle that could disconnect and a different one would connect. This permits sharing without collisions.


What is typical cmos logic gate output impedance?

The output impedance of a typical CMOS logic gate is generally high, typically in the range of tens to hundreds of kilo-ohms when in a high state (logic "1") and can drop significantly (to a few hundred ohms) when in a low state (logic "0"). This high output impedance in the high state allows for minimal power consumption, while the low output impedance in the low state enables efficient driving of subsequent stages. The specific value can vary depending on the technology node and design specifications used.


When tri state logic device is in the 3rd state then?

When a tri-state logic device is in the third or high-impedance state, it means that it is effectively disconnected from the circuit. This state allows multiple devices to share a common bus without interfering with each other. It is commonly used in buses and multiplexers to prevent conflicts and allow for efficient communication.


What is the variation of synchronous impedance with the state of magnetic saturation of machine?

in modern trend, synchronous impedance of alternator should be high. If impedance are more than voltage drop across its arm. Wdg. Is more .according to the phasor diagram of alternator if IaXs componant is more than magnitude of induced emf will also be increased.

Related Questions

What are tristate lines of dma 8257?

Tristate lines in the context of the DMA 8257 refer to the control lines that can be in one of three states: high, low, or high impedance (floating). This high impedance state allows multiple devices to share the same bus without interfering with each other, as it effectively disconnects the device from the bus when it is not actively transmitting data. The tristate feature is crucial for managing data transfers between the CPU and peripherals in a system, enabling efficient communication and minimizing conflicts.


What is know as tristate of 8086?

The tristate of the 8086 microprocessor refers to the three possible states of its output pins: high (logic 1), low (logic 0), and high-impedance (high-Z). In the high-impedance state, the output effectively disconnects from the circuit, allowing multiple devices to share the same bus without interference. This capability is crucial for bus-oriented architectures, enabling efficient data communication between the CPU and other components. The tristate output is essential for managing control signals and data transfer in complex systems.


How tristate occurs in a microcontroller?

Tristate in a microcontroller occurs when a pin is configured to operate in a high-impedance state, effectively disconnecting it from the circuit. This is typically achieved by configuring the pin as an input or by setting it to a special mode that allows it to neither drive a high nor a low signal. This state is useful for preventing bus contention when multiple devices share the same communication lines, allowing only one device to drive the line at any given time. In this way, tristate control is essential for managing data flow in multi-device environments.


Do Phineas and fern live in tristate area or dry state area?

Tri-state


When does ALE float to its high-impedance state?

These pins are not at their high-impedance stateduring a hold acknowledge.


What state is Bill Gates' house in?

Bill Gates lives in the state of Washington.


What is a tristate devices?

A tristate device is a device that has three states instead of two. The normal states are low and high, where the output is pulled down or up by turning on one of the two output transistors. The third state is floating, where neither transistor is turned on. Tristate devices are useful in a bus design where, for instance, more than one device can drive a data bus, but only one at a time.


What are the applications of tristate logic?

The most common application of tri-state logic is in the use of LED circuits. They can also be used on a shared electric bus.


State the application of RC coupled amplifier?

To increase the power gain ,high input impedance,low output impedance,and increase the weaken signal


Are there Northwest Savings Bank's in Washington State?

No, Northwest Savings Bank does not have any locations in Washington State. Northwest Savings Bank is primarily located in the Ohio, Pennsylvania, West Virginia tristate area.


What is tristate logic and what are its applications?

An output that can be placed in any of three (tri-) states: high, low, and disconnected. The disconnected state is provided so that these outputs can be used to drive common shared buses with all tristate outputs kept in the disconnected state except one, that one will drive the buss then in the next buss cycle that could disconnect and a different one would connect. This permits sharing without collisions.


What is typical cmos logic gate output impedance?

The output impedance of a typical CMOS logic gate is generally high, typically in the range of tens to hundreds of kilo-ohms when in a high state (logic "1") and can drop significantly (to a few hundred ohms) when in a low state (logic "0"). This high output impedance in the high state allows for minimal power consumption, while the low output impedance in the low state enables efficient driving of subsequent stages. The specific value can vary depending on the technology node and design specifications used.