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Intel 8086 and 8088
The Intel 8086/8088 family of microprocessors is a 16 bit architecture on a 16 bit (8086) or an 8 bit (8088) bus. The 8088 was the processor in the original IBM PC, and has evolved into the most popular processor used today in PC's and servers.
1,056 Questions
Clear direction flag (CLD) means that index registers will be incremented when looping through a string. Opposite of STD (set direction flag), which means the index registers of the string will be decremented when looping.
What is the meaning of 0FH in 8086 microprocessor?
0FH is a literal constant for the integer value 15. In the 8086/8088, as an opcode, it is the lock prefix, which means that no other CPU or bus master can take the bus during the execution of the instruction.
What are advantages of 8086 microprocessor?
The advantages of 8086 microprocessor are:
1. It is a 16 bit processor
2. it can perform operation of 16 bit data at a time
3. It has a pipeline architecture
4. It has high sped then 8085 micro processor
5. Due to the two different parallel working of processors such as BIU and EU the time is saved
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Various string instruction in 8086 microprocessor?
A series of data bytes or words available in a memory at consecutive locations, to be referred to collectively or individually, are called as byte strings or word strings.
Why implement 8086 processor to 8087 processor?
The 8086/8088 is the general purpose processor. The 8087 is the math co-processor for the 8086/8088.
How many chips with 12 address buses and 4 data buses are needed for 16k memory is needed.?
if we have 10 address bits then we can have a memory module of
2^10 = 1024 b = 1kb
so for 16kb we need
16*2^10 = 2^14=16kb
here we need 2 chips as 1 chip only provid us 2^12 memory.
Address and data bus are multiplexed to reduce complexity.
How many base registers are there in 8086?
There are four base registers in the 8086/8088; Code Segment (CS), Data Segment (DS), Stack Segment (SS), and Extra Segment (ES).
Difference between carry flag and overflow flag in 8086?
The carry flag indicates that an arithmetic operation between two numbers resulted in an unsigned carry or borrow. The overflow flag indicates that an arithmetic operation between two numbers resulted in an unexpected change in sign, i.e. an overflow.
Carry is also like overflow. The difference is in interpretation. Do you consider the numbers signed or unsigned? Its all in interpretation because the hardware logic needed to add two numbers works the same, no matter if they are considered signed or unsigned.
Both flags are set or cleared together, so you can use whichever you wish.
Why you call 32-bit processor?
Because of it can process 32 bit data at a time i.e. simultaneously
summary Because of word length is 32 bit i.e perform operation on 32 bit data at a time(so it is depend on data bus hence data bus is 32 bit)
Another reason is because of It has 32 Bit ALU in which 32 bit operation can be performed simultaneously.
What is difference between minimum mode and maximum mode of 8251?
The 8251 is a USART (Universal Synchronous Asynchronous Receiver Transmitter). It does not have a minimum and maximum mode.
What is tri-state bus in 8086?
A tri-state bus is a collection of pins (a bus) that supports three states, high, low, and floating/input. This is commonly used to implement bi-directional data flow.
The bus interface unit is the part of the processor that interfaces with the rest of the PC. Its name comes from the fact that it deals with moving information over the processor data bus, the primary conduit for the transfer of information to and from the CPU. The bus interface unit is responsible for responding to all signals that go to the processor, and generating all signals that go from the processor to other parts of the system.
How many instructions execute in one second in 8086 microprocessor?
The number of instructions that can execute in one second in the 8086 microprocessor is highly dependent on clock speed, memory wait time, and instruction complexity mix, but the generally accepted performance factor is 0.33 MIPS (Million Instuctions per Second) at a clock speed of 4.77 MHz.
What is an interrupt mask and when and why do you need masking?
masking of interrupts is the temporal disabling of the current code the processor is executing to let higher priority ISRs (interrupt Services Routine) to be executed.
A lining in a pipe, placed there to protect the material of the pipe from the contents that will be passing through the pipe.
Fibonacci series using 8086 microprocessor program?
In order to perform the fibonacci series, that is 1,1,2,3,5,8,13 .....
We initalize SI to 2000 and CX to 0, then we initilaize AX and BX registers. Then we increment SI Register by 1 and we move the contents of AL into SI register. Then we decrement cs by one and move the contents of BL o that of si and decrement CS. Then we add al and the bl registers.
Move al with contents of si +01 and move si with BL, then we increment si by one and repeat until cx=0 and we halt the program
CODE:
MOV SI,2000
MOV CX,0000
MOV CL,[SI]
MOV AX,0000
MOV BX,00
INC SI
MOV [SI], AL
DEC CX
INC SI
MOV [SI],BL
DEC CX
AGAIN ADD AL,BL
MOV [SI+01],AL
MOV BL,[SI]
INC SI
LOOP AGAIN
INT A5
----
code ends
How many type of instructions does the 32-bit Intel 8086 have?
The Intel 8086/8088 is not a 32 bit machine. It is a 16 bit machine. It has 72 instruction types.
Is a Q6600 processor 32 bit or 64 bit?
Q6600 is a 64 bit processor, but it can execute in 16 and 32 bit modes.
Explain the neat block diagram architecture of 8086 microprocessor?
Memory
Program, data and stack memories occupy the same memory space. The total addressable memory size is 1MB. As the most of the processor instructions use 16-bit pointers the processor can effectively address only 64 KB of memory. To access memory outside of 64 KB the CPU uses special segment registers to specify where the code, stack and data 64 KB segments are positioned within 1 MB of memory (see the "Registers" section below).
16-bit pointers and data are stored as:
address: low-order byte
address+1: high-order byte
32-bit addresses are stored in "segment:offset" format as:
address: low-order byte of segment
address+1: high-order byte of segment
address+2: low-order byte of offset
address+3: high-order byte of offset
Physical memory address pointed by segment:offset pair is calculated as:
address = ( * 16) +
Program memory - program can be located anywhere in memory. Jump and call instructions can be used for short jumps within currently selected 64 KB code segment, as well as for far jumps anywhere within 1 MB of memory. All conditional jump instructions can be used to jump within approximately +127 - -127 bytes from current instruction.
Data memory - the processor can access data in any one out of 4 available segments, which limits the size of accessible memory to 256 KB (if all four segments point to different 64 KB blocks). Accessing data from the Data, Code, Stack or Extra segments can be usually done by prefixing instructions with the DS:, CS:, SS: or ES: (some registers and instructions by default may use the ES or SS segments instead of DS segment).
Word data can be located at odd or even byte boundaries. The processor uses two memory accesses to read 16-bit word located at odd byte boundaries. Reading word data from even byte boundaries requires only one memory access.
Stack memory can be placed anywhere in memory. The stack can be located at odd memory addresses, but it is not recommended for performance reasons (see "Data Memory" above).
Reserved locations:
- 0000h - 03FFh are reserved for interrupt vectors. Each interrupt vector is a 32-bit pointer in format segment:offset.
- FFFF0h - FFFFFh - after RESET the processor always starts program execution at the FFFF0h address.
Interrupts
The processor has the following interrupts:
INTR is a maskable hardware interrupt. The interrupt can be enabled/disabled using STI/CLI instructions or using more complicated method of updating the FLAGS register with the help of the POPF instruction. When an interrupt occurs, the processor stores FLAGS register into stack, disables further interrupts, fetches from the bus one byte representing interrupt type, and jumps to interrupt processing routine address of which is stored in location 4 * . Interrupt processing routine should return with the IRET instruction.
NMI is a non-maskable interrupt. Interrupt is processed in the same way as the INTR interrupt. Interrupt type of the NMI is 2, i.e. the address of the NMI processing routine is stored in location 0008h. This interrupt has higher priority then the maskable interrupt.
Software interrupts can be caused by:
- INT instruction - breakpoint interrupt. This is a type 3 interrupt.
- INT instruction - any one interrupt from available 256 interrupts.
- INTO instruction - interrupt on overflow
- Single-step interrupt - generated if the TF flag is set. This is a type 1 interrupt. When the CPU processes this interrupt it clears TF flag before calling the interrupt processing routine.
- Processor exceptions: divide error (type 0), unused opcode (type 6) and escape opcode (type 7).
Software interrupt processing is the same as for the hardware interrupts.
I/O ports
65536 8-bit I/O ports. These ports can be also addressed as 32768 16-bit I/O ports.
Registers
Most of the registers contain data/instruction offsets within 64 KB memory segment. There are four different 64 KB segments for instructions, stack, data and extra data. To specify where in 1 MB of processor memory these 4 segments are located the processor uses four segment registers:
Code segment (CS) is a 16-bit register containing address of 64 KB segment with processor instructions. The processor uses CS segment for all accesses to instructions referenced by instruction pointer (IP) register. CS register cannot be changed directly. The CS register is automatically updated during far jump, far call and far return instructions.
Stack segment (SS) is a 16-bit register containing address of 64KB segment with program stack. By default, the processor assumes that all data referenced by the stack pointer (SP) and base pointer (BP) registers is located in the stack segment. SS register can be changed directly using POP instruction.
Data segment (DS) is a 16-bit register containing address of 64KB segment with program data. By default, the processor assumes that all data referenced by general registers (AX, BX, CX, DX) and index register (SI, DI) is located in the data segment. DS register can be changed directly using POP and LDS instructions.
Extra segment (ES) is a 16-bit register containing address of 64KB segment, usually with program data. By default, the processor assumes that the DI register references the ES segment in string manipulation instructions. ES register can be changed directly using POP and LES instructions.
It is possible to change default segments used by general and index registers by prefixing instructions with a CS, SS, DS or ES prefix.
All general registers of the 8086 microprocessor can be used for arithmetic and logic operations. The general registers are:
Accumulator register consists of 2 8-bit registers AL and AH, which can be combined together and used as a 16-bit register AX. AL in this case contains the low-order byte of the word, and AH contains the high-order byte. Accumulator can be used for I/O operations and string manipulation.
Base register consists of 2 8-bit registers BL and BH, which can be combined together and used as a 16-bit register BX. BL in this case contains the low-order byte of the word, and BH contains the high-order byte. BX register usually contains a data pointer used for based, based indexed or register indirect addressing.
Count register consists of 2 8-bit registers CL and CH, which can be combined together and used as a 16-bit register CX. When combined, CL register contains the low-order byte of the word, and CH contains the high-order byte. Count register can be used as a counter in string manipulation and shift/rotate instructions.
Data register consists of 2 8-bit registers DL and DH, which can be combined together and used as a 16-bit register DX. When combined, DL register contains the low-order byte of the word, and DH contains the high-order byte. Data register can be used as a port number in I/O operations. In integer 32-bit multiply and divide instruction the DX register contains high-order word of the initial or resulting number.
The following registers are both general and index registers:
Stack Pointer (SP) is a 16-bit register pointing to program stack.
Base Pointer (BP) is a 16-bit register pointing to data in stack segment. BP register is usually used for based, based indexed or register indirect addressing.
Source Index (SI) is a 16-bit register. SI is used for indexed, based indexed and register indirect addressing, as well as a source data address in string manipulation instructions.
Destination Index (DI) is a 16-bit register. DI is used for indexed, based indexed and register indirect addressing, as well as a destination data address in string manipulation instructions.
Other registers:
Instruction Pointer (IP) is a 16-bit register.
Flags is a 16-bit register containing 9 1-bit flags:
- Overflow Flag (OF) - set if the result is too large positive number, or is too small negative number to fit into destination operand.
- Direction Flag (DF) - if set then string manipulation instructions will auto-decrement index registers. If cleared then the index registers will be auto-incremented.
- Interrupt-enable Flag (IF) - setting this bit enables maskable interrupts.
- Single-step Flag (TF) - if set then single-step interrupt will occur after the next instruction.
- Sign Flag (SF) - set if the most significant bit of the result is set.
- Zero Flag (ZF) - set if the result is zero.
- Auxiliary carry Flag (AF) - set if there was a carry from or borrow to bits 0-3 in the AL register.
- Parity Flag (PF) - set if parity (the number of "1" bits) in the low-order byte of the result is even.
- Carry Flag (CF) - set if there was a carry from or borrow to the most significant bit during last result calculation.
Instruction Set
8086 instruction set consists of the following instructions:
- Data moving instructions.
- Arithmetic - add, subtract, increment, decrement, convert byte/word and compare.
- Logic - AND, OR, exclusive OR, shift/rotate and test.
- String manipulation - load, store, move, compare and scan for byte/word.
- Control transfer - conditional, unconditional, call subroutine and return from subroutine.
- Input/Output instructions.
- Other - setting/clearing flag bits, stack operations, software interrupts, etc.
Addressing modes
Implied - the data value/data address is implicitly associated with the instruction.
Register - references the data in a register or in a register pair.
Immediate - the data is provided in the instruction.
Direct - the instruction operand specifies the memory address where data is located.
Register indirect - instruction specifies a register containing an address, where data is located. This addressing mode works with SI, DI, BX and BP registers.
Based - 8-bit or 16-bit instruction operand is added to the contents of a base register (BX or BP), the resulting value is a pointer to location where data resides.
Indexed - 8-bit or 16-bit instruction operand is added to the contents of an index register (SI or DI), the resulting value is a pointer to location where data resides.
Based Indexed - the contents of a base register (BX or BP) is added to the contents of an index register (SI or DI), the resulting value is a pointer to location where data resides.
Based Indexed with displacement - 8-bit or 16-bit instruction operand is added to the contents of a base register (BX or BP) and index register (SI or DI), the resulting value is a pointer to location where data resides.
Which bit of flag register is used for controlling the si and di?
The direction flag (DF) is used to control the use and direction of repeated string operations involving DI and SI.
How many address lines are there in a 16 to 1 multiplexer?
20 address line available in 16 to 1 multiplexer 16 for input lines and 4 will be selection lines.
