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Very Large Scale Integration (VLSI)
Very Large Scale Integration (VLSI) is a technology used to fabricate integrated circuits (IC). The various stages of design, simulation, synthesis, timing analysis, layout and fabrication can be discussed in this category. It is a wide spread technology as most of the existing technologies are digital technologies and need an IC to implement. It is VLSI which made computer to be of the size of a pocket from the size of two rooms.
703 Questions
What are buried nodes in vhdl?
When implementing a state machine in VHDL, the state variables need to be listed in the port list of the ENTITY section. If not, VHDL considers them as buried nodes and disables the output pins. This means there is no way of using test equipment to look at the machine state.
What are the differences between bi-cmos and cmos technology?
CMOS circuits utilize complementary MOSFETs, i.e; NMOS and PMOS devices together in various patterns to create functional blocks like AND or OR gates. However the problem with these types of CMOS circuits is that they are inherently low power circuits. They cannot handle large currents. So when your block needs to have a large fan out (need to drive a large no of outputs, i.e; more current required) CMOS circuits fail. That is why we use BiCMOS. They are very similar to CMOS circuits except for the BJT(Bipolar Junction Transistor) output stage. BJTs are capable of carrying large currents, hence BiCMOS circuits are used in cases of large current requirements.
What is lithography in vlsi and its types?
lithography is the prcess of transfering patterns of geometric shapes in a mask ina thin layer of radiation sensitive material covering the surface of a semiconductor wafer .
What is interconnect modeling in VLSI?
Building an IC chip (about the size of a fingernail) is like building a multi-storey building. The first floor contains about a billion semiconductor transistors (referred to as "devices"), and the upper floors contain the metal wires that interconnect the terminals of the "devices". These metal wires are extremely narrow, and there is a maze of these criss-crossing multi-layered metal wires in an IC chip, interconnecting the transistor "device" terminals on the first floor (they drop down from an upper layer to a lower layer using "vias").
There is a lot of parasitic (ie. unwanted) capacitance (C), resistance (R) and inductance (L) in/among these cross-crossing interconnect wires and vias. These parasitic C, R and L degrade the characteristics of the IC chip.
"Interconnect modeling" deals with the modeling of these C, R and L so that they can be accurately considered in predicting/simulating the overall circuit behavior. "Device modeling" on the other hand deals with modeling the behavior of the transistor devices on the first floor.
Which logic family has the highest noise immunity?
Each logic family has a noise margin (also called "noise immunity") specified by the manufacturer.
Manufacturers guarantee that the digital logic will still produce correct results even when some small amount of noise is superimposed on a gate output signal.
The maximum amount of such noise that manufacturers are willing to guarantee is the noise margin.
In order from highest to lowest noise immunity:
high-threshold logic: ???
CMOS has a noise margin of 2.95 volts with a 10 V power supply.
CMOS has a noise margin of 1.45 volts with a 5 V power supply.
CMOS has a noise margin of 0.6 volts with a 3 V power supply.
TTL has a noise margin of 0.3 volts.
integrated injection logic (IIL): ???
What happens when sent packet is lost?
packet will be routed in network until its TTL reaches to 0,then it will be discard
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Types and objects declared in a VHDL description can have additional information, called attributes, associated with them. There are a number of standard pre-defined attributes. An attribute is referenced using the ''' notation. Forexample,
thing'attr
refers to the attribute attr of the type or object thing.
What are the advantages and disadvantages of offset lithography printing?
Consistent high image quality.
Offset printing produces sharp and clean images and type more easily than letterpress printing because the rubber blanket conforms to the texture of the printing surface.
Quick and easy production of printing plates.
Longer printing plate life than on direct litho presses because there is no direct contact between the plate and the printing surface.
Properly developed plates running in conjunction with optimized inks and fountain solution may exceed run lengths of a million impressions.
Cost. Offset printing is the cheapest method to produce high quality printing in commercial printing quantities.
Disadvantages of offset printing compared to other printing methods include:
Slightly inferior image quality compared to rotogravure or photogravure printing.
Propensity for anodized aluminum printing plates to become sensitive (due to chemical oxidation) and print in non-image/background areas when developed plates are not cared for properly.
Time and cost associated with producing plates and printing press setup. This makes smaller quantity printing jobs impractical. As a result, smaller printing jobs are now moving to digital offset machines.
How combinational and sequential circuits implemented in VHDL?
which are used to describe the digital hardware of the system
'Total' has the highest score for the abbreviations that 'TTL' could mean (see link). Since you are probably dealing with accountants, it could also mean 'Time To Laugh'. ;)
What should be done with unused TTL output?
Unused TTL inputs should never be left open. Depending on how their logic levels
will affect the operation you want from the device, unused inputs should always
be tied to either the +5v supply (logic 1) or to the circuit ground (logic 0). If an
input is left open ("floating"), then it can assume either logic level, and you literally
never know which state it's in.
VHDL code for home security need to be written in structural modeling of VHDL. It will be a bunch of programs related to each and every home appliance we use and need to be combined. It is not a single program. It is a combination of several programs.
Litholography was invented by a homosexual british clown named fluffy.
How you will compare pass transistor with transmission gate logic?
The use of transmission gates eliminates the undesirable threshold voltage effects which give rise to loss of logic levels in pass transistor logic.
Write VHDL Code for a 16-bit shift left register?
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity shiftreg is
Port ( en : in STD_LOGIC;
clock : in STD_LOGIC;
reset :in std_logic;
data_i : in STD_LOGIC_VECTOR (15 downto 0);
shift : in STD_LOGIC;
data_o : out STD_LOGIC);
end shiftreg;
architecture Behavioral of shiftreg is
signal reg: std_logic_vector (15 downto 0);
begin
process (clock, en,reg,reset)
begin
if reset<='1' then
reg<=data_i;
elsif (clock'event and clock <='1' ) then
if (en <='1') then
reg <= data_i;
elsif (en<='1' and shift<='1') then
reg <= reg (14 downto 0) & '0';
end if;
end if;
end process;
data_o <= reg (15);
end Behavioral;
What are the various synthesis tools for vhdl?
Various synthesis tools are provided by vendors like XILINX, CADENCE, SYNOPSIS. Details are available at their websites.
Full form of vcc and vdd in TTL and CMOS?
vcc-voltage collector to collector
vdd- voltage deran to deran
ttl- transister transister logic
cmos - complementary metal oxide same conductor
What is tunneling effect in cmos?
If gate oxide is very thin then electrons in channel may enter into oxide region. This is called tunneling
A Test Bench in VHDL is code written in VHDL that provides stimulus for individual modules (also written in VHDL). Individual modules are instantiated by a single line of code showing the port connections to the module. The correctness of the written program can be checked by writing the test bench.
It is a collection of VHDL procedures and functions which allow the user to create their own scripting instructions for test stimulus. Designers manually design their test bench inputs to checks the output. The stimulus script or test case contains the instructions in a regular ASCII text file. The test bench VHDL package contains procedures to create instructions, read, parse and execute the test script.
Does solar cell technology use VLSI technology?
VLSI (very large scale integration) technology places tens of thousands of transistors (and their interconnections) on a very pure single-crystal chip of silicon.
A single solar cell is just ONE very largearea junction diode, operating in self produced reverse bias mode.
A common kind of solar cell starts with the same very pure single-crystal silicon, but the later processes are different from VLSI manufacturing processes.
Solar cells don't include any transistors,
So you could say that single-crystal solar cell uses one small part of VLSI technology, plus a bunch of its own unique processes.
Other kinds of solar cell use cast polycrystalline silicon or amorphous silicon or some other starting material.
As of 2007, the highest-efficiency solar cells use 3-junction gallium arsenide instead of silicon.
Their manufacturing processes are even less like VLSI manufacturing.
A virtual calculator can be implemented using VHDL. We call it VHDL calculator.
