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Very Large Scale Integration (VLSI)
Very Large Scale Integration (VLSI) is a technology used to fabricate integrated circuits (IC). The various stages of design, simulation, synthesis, timing analysis, layout and fabrication can be discussed in this category. It is a wide spread technology as most of the existing technologies are digital technologies and need an IC to implement. It is VLSI which made computer to be of the size of a pocket from the size of two rooms.
703 Questions
A VHDL program is written to realize an electronic circuit, system or design. After simulating the code, one needs to dump it into an FPGA or CPLD. This programmable logic device, after dumping, act like the designed system. The inter connections of these devices need to be made as per the code. This means that that a program code which might be logic based now needs to be converted into a physically realizable structure. This involves building a physical structure within an FPGA or CPLD. This process involves converting the VHDL code into a format that can be understood by FPGA or CPLD. Converting our code into 1s and 0s that suit the FPGA or CPLD structure is called synthesis.
Which operator cannot be synthesized by a VHDL synthesis tool?
"&" operator is not synthesized by VHDL synthesis tool.
No single individual, no single company. VLSI was just one of the steps in the process of the industry learning how to squeeze more components on each chip. It is long obsolete.
A CMOS socket is to plug a CMOS transistor into. Alternatively, a CMOS socket is to plug a CMOS integrated circuit into.
CMOS, by the way, stands for, "Complementary Metal Oxide Semiconductor".
What is the effect of frenkel schottky defect on elictrical conductivity?
Both Frenkel and Schotty defects improve the electrical conductivity of an ionic crystal.
Why low power VLSI technology is preferredover VLSI technology?
Low power VLSI is preferred over VLSI.
It is because of the following reasons
- It consumes less power i. e. the power consumption is low
- The power dissipation is also low
- most of the modern devices need to operate at low power
- Complex systems can be designed with reliability as the power consumption is low.
We use modern electronic devices like mobiles ans robotics. These are generally compact and movable. Hence, they operate with a battery rather than power connection. Hence, we need low power operation.
In VHDL, the next statement or command or instance is generally selected using a clock pulse.
clk'event and clk = '1'
means rising edge of the clock.
clk'event and clk = '0'
means rising falling of the clock.
The statement written after this line executes after the occurrence of a rising or falling edge of a clock.
if (clk'event and clk = '1')
The above statement makes the next statement or command to execute for every rising edge of the clock. By applying a clock pulse with minimum time period, we can make the next command to be called.
What the threshold voltage depends on?
The threshold voltage of a device, such as a transistor, depends on its physical structure and material properties, such as channel length, channel doping concentration, oxide thickness, and gate material. It is also affected by external factors like temperature and supply voltage. In digital circuits, the threshold voltage is a critical parameter that determines the device's switching behavior.
What are the types of modeling in VHDL?
VHDL can be written in three different models. They are called
- data flow model
- behavioral model
- structural model
Before attempting a VHDL program, one should know the steps involced in these modeling styles.
Data flow model:
In this model, the input data simply flows into the output. THat is, we will be implementing the relation between input and output terminals directly.
For example,
c < = a and b;
Here, the output c is an ANDing of a and b. We are actually implementing the direct relation between inputs and outputs. That is, c = a + b.
Hence, we need not write any complex conditional statements here in data flow model.
Simply implement the output expression. Thats all.
Here, we are implementing the code at a very basic level i. e. circuit level or gate level.
Behavioral model:
Here, in behavioral model, one needs to code the behavior of the system to be designed. If we consider the same above example, the behavior is that, the output should be one (1) whenever both the inputs are one (1).
we can code it like this:
if (a=1 and b=1) then
c<='1';
else
c<='0';
Or, we can even have the behavior like this:
case s is
when "00"=>c<='0';
when "01"=>c<='0';
when "10"=>c<='0';
when "11"=>c<='1';
We are implementing the LOGIC here. We are least bothered about the circuits that can implement this logic. Hence, it is a system level or logic level modeling style.
Structural modeling:
In structural modeling of VHDL, the concept of components is used. In this model, the system to be designed is considered as a combination of sub structures. These sub structures are called components.
For example, a full adder is a combination of two half adders and an or gate. Hence, the components used for designing a full adder are
- half adder
- OR gate
Initially, these components are mentioned in the architecture of a full adder VHDL program. We call this as component initiation. Then the components are called onto the main program and used. Remember, we are using the functionality of the components in main program but we are not coding them in the main program. The code for the component programs will be present somewhere else in the project. Means, code them once and use them infinite number of times.
What are buried nodes in vhdl?
When implementing a state machine in VHDL, the state variables need to be listed in the port list of the ENTITY section. If not, VHDL considers them as buried nodes and disables the output pins. This means there is no way of using test equipment to look at the machine state.
What are the differences between bi-cmos and cmos technology?
CMOS circuits utilize complementary MOSFETs, i.e; NMOS and PMOS devices together in various patterns to create functional blocks like AND or OR gates. However the problem with these types of CMOS circuits is that they are inherently low power circuits. They cannot handle large currents. So when your block needs to have a large fan out (need to drive a large no of outputs, i.e; more current required) CMOS circuits fail. That is why we use BiCMOS. They are very similar to CMOS circuits except for the BJT(Bipolar Junction Transistor) output stage. BJTs are capable of carrying large currents, hence BiCMOS circuits are used in cases of large current requirements.
What is lithography in vlsi and its types?
lithography is the prcess of transfering patterns of geometric shapes in a mask ina thin layer of radiation sensitive material covering the surface of a semiconductor wafer .
What is interconnect modeling in VLSI?
Building an IC chip (about the size of a fingernail) is like building a multi-storey building. The first floor contains about a billion semiconductor transistors (referred to as "devices"), and the upper floors contain the metal wires that interconnect the terminals of the "devices". These metal wires are extremely narrow, and there is a maze of these criss-crossing multi-layered metal wires in an IC chip, interconnecting the transistor "device" terminals on the first floor (they drop down from an upper layer to a lower layer using "vias").
There is a lot of parasitic (ie. unwanted) capacitance (C), resistance (R) and inductance (L) in/among these cross-crossing interconnect wires and vias. These parasitic C, R and L degrade the characteristics of the IC chip.
"Interconnect modeling" deals with the modeling of these C, R and L so that they can be accurately considered in predicting/simulating the overall circuit behavior. "Device modeling" on the other hand deals with modeling the behavior of the transistor devices on the first floor.
Which logic family has the highest noise immunity?
Each logic family has a noise margin (also called "noise immunity") specified by the manufacturer.
Manufacturers guarantee that the digital logic will still produce correct results even when some small amount of noise is superimposed on a gate output signal.
The maximum amount of such noise that manufacturers are willing to guarantee is the noise margin.
In order from highest to lowest noise immunity:
high-threshold logic: ???
CMOS has a noise margin of 2.95 volts with a 10 V power supply.
CMOS has a noise margin of 1.45 volts with a 5 V power supply.
CMOS has a noise margin of 0.6 volts with a 3 V power supply.
TTL has a noise margin of 0.3 volts.
integrated injection logic (IIL): ???
What happens when sent packet is lost?
packet will be routed in network until its TTL reaches to 0,then it will be discard
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