An interrupt in the 8085, like in most computers, is a request to execute code out of sequence, usually by an external event, such as a signal from an IO device. In the 8085, an interrupt is almost exactly like a CALL instruction, except that the accumulator and flags register is also pushed on the stack. (Recall that the CALL instruction only pushes the return address on the stack.)This means that to return from an interrupt you must also pop the accumulator and flags, and this is done simply with the IRET instruction, as opposed to the RET instruction. In the 8085, the interrupt addresses are located in low memory, though the actual interrupt address could be anywhere if the interrupting device is capable of generating the three byte CALL sequence instead of the simpler INTx sequence, or the even simpler INTx.5 sequence.
There are 2 types interrupts in 8085 such as: 1)hardware interrupt 2)software interrupt
The pins used to control interrupts in the 8085 are INTR/INTA, RST5.5, RST6.5, RST7.5, and TRAP.
DI = Disable all interrupts (except TRAP) EI = Enable all interrupts Also, SIM can selectively mask RST5.5, RST6.5, and RST7.5.
The 8085 has a single +5V power supplyThe 8085 has a multiplexed low order address busThe 8085 has extra single pin interrupts, TRAP, RST7.5, RST6.5, and RST5.5The 8085 has serial I/O pins SID and SODThe 8085 has maskable interrupts and the RIM/SIM instructionThe 8085 includes the functionality of the 8224 clock genereator and 8228 system controllerThe 8085 added several 16 bit operations
The hardware initiates an interrupt when it feels that the situation requires the CPU's action.
The lowest priority interrupt in the 8085 microprocessor is INTR, unless you also consider the software interrupts, RST 0 through RST 7, which are even lower.
Four of the interrupts in the Intel 8085 (INTR, RST5.5, RST6.5, and RST7.5) are maskable, while one interrupt (TRAP) is non-maskable.The eight RSTx type of software "interrupts" are not really interrupts, but if they were treated as interrupts, they would be non-maskable.
At reset, the 8085 starts at location 0000H. The INTR interrupt goes wherever the interrupt opcode says to go. The TRAP interrupt goes to 0024H. The RST5.5, RST6.5, and RST7.5 interrupts go to 002CH, 0034H, and 003CH respectively. The RST X interrupts goto 0000H plus 10H times X, i.e. 0000H, 0008H, 0010H, ..., 0038H.
TRAP is a non maskable interrupt pin in 8085.....it has the highest priority out of all the interrupts...it is used in emergency n critical states..ex.during power loss etc.
The 8085 does not have an adjustable priority interrupt schema. You can only turn interrupts off, and mask certain interrupts, such as RST5.5, RST6.5, and RST7.5. However, that said, you can implement a priority schema, of sorts, within these interrupts, including INTR, by using the SIM instruction. You can't change the basic priority but you can disable certain interrupts while others are being serviced, if you so choose.
The 8085 was the next generation of the 8080, providing operation on a single +5V power supply, a multiplexed address/data bus, integration of the system controller and clock generator, new automatically vectored interrupts, a few 16 bit instructions, and serial I/O.
There is no 8085 that operates at 101 MHz. The fastest 8085 operates at 12 MHz, requiring a 24 MHz crystal.