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The read pin (RD/) on the 8085 is pin 32. It indicates that external logic should drive the data bus with data during a read cycle. It goes true (low) one half clock cycle after the falling edge of ALE, at which point external hardware should have strobed the content of the data bus to record the low order address bus value. At the same time, READY (pin 35) is sampled. If READY is found to be false (low), the processor holds the state of all lines for one clock cycle and then repeats. One clock cycle after READY is true, the processor samples the data bus. One half clock cycle later, RD/ is set false (high), ending the read cycle, at which point the external hardware must stop driving the data bus. One half clock cycle later, a new machine cycle starts with the rising edge of ALE.

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