AND gate is A.B
If two not gates are added at both inputs of and gate then output becomes A'.B' which is equal to (A+B)' by DeMorgan's law.
hence the nor gate is formed
Update: Put more simply, invert A and B by attaching A to both inputs of one NOR and attaching B to both inputs of another NOR, then NOR the results of the previous two NOR gates. Total of three NOR gates in a two-level implementation.
NAND can obviously be created by inverting the result.
no
Next: Boolean Expressions Up: Universality of certain gates Previous: Universality of certain gates ContentsUsing NAND gatesNOTFigure 12.10: Realizing a NOT gate using a NAND gateOR The following statements are called DeMorgan's Theorems and can be easily verified and extended for more than two variables.(12.1)(12.2)(12.3)(12.4)In general: (12.5)Thus :(12.6)Now it is easy to see that , which can be checked from the truth table easily. The resulting realization of OR gate is shown in 12.11Figure 12.11: Realization of OR gate by NAND gatesAND gateFigure 12.12: Realization of AND gate by NAND gatesX-OR gate(12.7)Clearly, this can be implemented using AND, NOT and OR gates, and hence can be implemented using universal gates.Figure 12.13: X-OR gateX-NOR gate(12.8)Again, this can be implemented using AND, NOT and OR gates, and hence can be implemented using universal gates, i.e., NAND or NOR gates.Figure 12.14: X-NOR gateNext: Boolean Expressions Up: Universality of certain gates Previous: Universality of certain gates Contentsynsingh 2007-07-25
for a two input gate to represent as an n-input gate excatly n-1 two input gates are required. this implies that for a two input OR gate to represent a four input OR gate exactly three two input OR gates are required let F is =a+b+c+d =(((a+b)+c)+d) =((a+b)+(c+d)) in both the above cases + is used three times so three two input OR gates make a four input OR gates. This discussion doesnot hold good for NAND gates an example can illlustrate the reson:- take F=(a.b.c.d)'=a'+b'+c'+d' --------------------------->(1) (this is obtained by a four input NAND gate) let us take this in the manner we did it for an OR gate and we will then verify the result. =((a.b)'(c.d)')' =((a'+b').(c'+d'))' =(a'+b')'+(c'+d')' =ab+cd <------------------------(2) (1)is not equal to (2) so we can say that a NAND gate cannot be replaced in the manner as OR gate is replaced
by the procedure design a half subtractor design a logic ciruit to add two numbers with five bits each drawthe logic diagram of afull adder using using NAND gates only ?
more logic gates are used instead
Given two inputs, A and B. Use one NAND as an inverter (one source to both inputs) for A. Do the same for B. Use one NAND gate with inputs \A (not A, the output from the first gate) and B. Use one NAND gate with inputs A and \B. Use one last NAND gate with inputs coming from the two previous gates. Its output will behave like an XOR gate. Alternatively: Gates G1, G2, G3, G4, arrange in a diamond with G1 and G4 at the left and right vertices, A input along top edge, B input along bottom edge. G2 at top center, G3 at bottom center. A goes to G1 and G2, B goes to G1 and G3, G2 and G3 go to G4. Net list: A - G1i1 A - G2I1 B - G1i2 B - G3I2 G1o - G2i2 G1o - G3i1 G2o - G4i1 G3o - G4i2 G4o - A^B
universal logic gate is a gate using which you can make all the logic gates there are two such gates NOR gate and NAND gate
an AND gate and a NOT gate
The two categories for logic gates are basic logic gates and universal gates. Gates are identified by their function and universal gates are identified as NAND gate or NOR gate.
Any logic gate from which all other logic gate functions can be derived. The two universal gates are NAND and NOR.
A logic circuit of any complexity can be realized by using only the three basic gates (NOT, AND, and OR Gates). There are two universal gates, the NAND Gate and the NOR gate. Each of those can also realize logic circuit single-handedly. The NAND and NOR gates are therefore called universal gates.
two nand gates
No, XOR gate is a not a universal gate. There are basically two universal gates NAND and NOR.
Next: Boolean Expressions Up: Universality of certain gates Previous: Universality of certain gates ContentsUsing NAND gatesNOTFigure 12.10: Realizing a NOT gate using a NAND gateOR The following statements are called DeMorgan's Theorems and can be easily verified and extended for more than two variables.(12.1)(12.2)(12.3)(12.4)In general: (12.5)Thus :(12.6)Now it is easy to see that , which can be checked from the truth table easily. The resulting realization of OR gate is shown in 12.11Figure 12.11: Realization of OR gate by NAND gatesAND gateFigure 12.12: Realization of AND gate by NAND gatesX-OR gate(12.7)Clearly, this can be implemented using AND, NOT and OR gates, and hence can be implemented using universal gates.Figure 12.13: X-OR gateX-NOR gate(12.8)Again, this can be implemented using AND, NOT and OR gates, and hence can be implemented using universal gates, i.e., NAND or NOR gates.Figure 12.14: X-NOR gateNext: Boolean Expressions Up: Universality of certain gates Previous: Universality of certain gates Contentsynsingh 2007-07-25
Next: Boolean Expressions Up: Universality of certain gates Previous: Universality of certain gates ContentsUsing NAND gatesNOTFigure 12.10: Realizing a NOT gate using a NAND gateOR The following statements are called DeMorgan's Theorems and can be easily verified and extended for more than two variables.(12.1)(12.2)(12.3)(12.4)In general: (12.5)Thus :(12.6)Now it is easy to see that , which can be checked from the truth table easily. The resulting realization of OR gate is shown in 12.11Figure 12.11: Realization of OR gate by NAND gatesAND gateFigure 12.12: Realization of AND gate by NAND gatesX-OR gate(12.7)Clearly, this can be implemented using AND, NOT and OR gates, and hence can be implemented using universal gates.Figure 12.13: X-OR gateX-NOR gate(12.8)Again, this can be implemented using AND, NOT and OR gates, and hence can be implemented using universal gates, i.e., NAND or NOR gates.Figure 12.14: X-NOR gateNext: Boolean Expressions Up: Universality of certain gates Previous: Universality of certain gates Contentsynsingh 2007-07-25
A "Nand" gate is an "And" gate with an "Inverter" added to its output. To get a logic 1 output from a "Nand" gate, you need a logic 0 on both of its inputs. If I understand your question correctly, you have three "Nand" gates. Presumably the outputs of two of them are connected to the inputs of the third. Logic 1 at both inputs of the first two "Nand" gates will produce a logic 0 output from both of them. The two logic 0's are fed to the inputs of the third "Nand" gate producing a logic 0 output from the third "Nand" gate.
an 2 input AND gate can be realize using 3 NOR gates.Let ,A and B are the input and x be the output.x=A.B= NOR(NOR(A) NOR(B))
A&B = ((A&B)')' So two, it would go a - | ==NAND--=NAND-- b - | By using two NAND gates back-to-back, you can create a normal AND gate.