10 ANd and 4 Or gate..
9,to implement a half adder 5 nand gates and for a full adder,another xor gate is required consisting of 4 nand gates. thus a total of 9 nand gates are required for a full adder.
You cannot design a full adder using only OR gates. You also need AND gates. Typically, this can be done with just NAND gates.
12 NOR gates are required to implement full adder
12
more logic gates are used instead
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ab+bc
I see you have asked a wise question, grasshopper.
full adder is made of x-or gates and gates and inverters.it can also be made of two half adders and one or gate.full adder consists of 3 inputs lines and 2 output lines which can be named as sum(s) and carry(c).it is a combinational circuit. s= a xor b xor c(if inputs are named as a ,b,c) c=ab+bc+ca
by using 4 NCL gates we can design or implement a half adder.gates used in half adder are TH12[1 GATE],TH22[1 GATE] and TH24COMP0 [2 GATES].this NCL have a concept of DUAL-RAIL.output we get for this are S0,S1,Cout0,Cout1.
i have the same question. please some1 answer it...
Maybe you don't wanna understand or basically don't have to dear it's your decision