Maybe you don't wanna understand or basically don't have to dear it's your decision
12 NOR gates are required to implement full adder
9,to implement a half adder 5 nand gates and for a full adder,another xor gate is required consisting of 4 nand gates. thus a total of 9 nand gates are required for a full adder.
You cannot design a full adder using only OR gates. You also need AND gates. Typically, this can be done with just NAND gates.
implement it. enough said.
Check this link http://www.dumpt.com/img/viewer.php?file=bd6b3mqsa66fhr6c76l1.bmp
12
A full adder can be constructed using basic logic gates: XOR, AND, and OR gates. Specifically, two XOR gates are used to calculate the sum, while two AND gates and one OR gate are employed to determine the carry-out. The first XOR gate takes the two input bits, and the second XOR gate incorporates the carry-in. The AND gates handle the carry generation, with the OR gate combining the outputs to produce the final carry-out.
by the procedure design a half subtractor design a logic ciruit to add two numbers with five bits each drawthe logic diagram of afull adder using using NAND gates only ?
The full adder takes care of everything, A, B, CarryIN, Sum, and CarryOut. I don't see why you would need a half adder after using a full adder, unless you were trying to process look-ahead carry, but that requires more than just a half adder.
Logic circuit forplementation of a full adder using decoder and 2 or gate? Read more:Logic_circuit_forplementation_of_a_full_adder_using_decoder_and_2_or_gate
i want to get the answer of this ?
Oh, dude, using two half adders to make a full adder can be a bit of a hassle. You might need more components, which means more space and potentially slower performance. It's like trying to fit a square peg into a round hole - sure, it works, but it's not the most efficient way to do things.