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It is possible to allow nested interrupts. This is often done when there is a heirarchy of interrupts, some with higher priority than others. In order for this to work, the second interrupt must not be allowed to influence the progress of the first interrupt. We call this being "thread safe". In a nested scheme, an interrupt mask is set so that higher priority interrupts can be permitted, while blocking interrupts of the same or lower priority, and then interrupts are reenabled during the interrupt service routine. At the conclusion of the first routine, interrupts are disabled again, the mask is restored, and the normal interrupt return sequence is executed.

In the 8085, this can be supported using the Read Interrupt Mask (RIM) and Set Interrupt Mask (SIM) instructions. While not strictly required, the logical priority is often INTR, RST5.5, RST6.6, RST7.5, and then TRAP, in order of increasing priority.

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Q: Should any device be allowed to interrupt CPU while another interrupts are being serviced?
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Related questions

What happens when processor is attending an interrupt if it gets another interrupt?

The response to another interrupt request during servicing of an interrupt depends on the setting of the interrupt enable flag and/or the interrupt mask. If the interrupt service routine is thread safe, it will process correctly. More probably, problems will arise so the proper procedure is to either set the interrupt mask (8085) to not allow this or lower priority interrupts before reenabling interrupt, or to leave interrupts disabled until this iteration is complete. If interrupts are disabled or masked, a subsequent interrupt will be posted but not processed until the first is completed.


What is an maskable intErrupt?

interrupts in 8085 are basically classified into two types: 1.Maskable 2.Non maskable maskable interrupts are those which can be delayed.This is done by masking off the interrupts which are not required. Maskable interrupts are:RST 7.5,RST 6.5,RST 5.5 and INTR <decreasing order of priority>


When an interrupt is serviced then what happens if another interrupt is raised?

It depends on the CPU architecture. Most modern CPUs support several levels of interrupts ranging from high priority to low. If the first interrupt that occurred was a high priority, then a lower priority one occurs, the high priority will continue to execute until it is done, then the the CPU will immediately jump to the lower one. Conversely, if the lower priority interrupt occurred first, it will be interrupted until the higher interrupt is serviced. For 80x86 series processors, do not confuse priority with vector. You may remember in the older days interrupt 13 belonging to the hard drive, and interrupts 3 and 4 being part of the serial port. This is not a function of the CPU but of the interrupt controller. The function of this device is beyond the scope of my answer here. 80x86 has 2 interrupt sources: maskable and non-maksable. Think of the non-maskable as the higher priority and the maskable as the lower. Most peripherals use the maskable interrupt line. Although a few, often functions of the BIOS, Fault, or Paged/Protected mode make use of the non-masked interrupt.


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